LM5069EVAL/NOPB National Semiconductor, LM5069EVAL/NOPB Datasheet - Page 2

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LM5069EVAL/NOPB

Manufacturer Part Number
LM5069EVAL/NOPB
Description
BOARD EVALUATION LM5069
Manufacturer
National Semiconductor
Datasheets

Specifications of LM5069EVAL/NOPB

Main Purpose
Power Management, Hot Swap Controller
Utilized Ic / Part
LM5069
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Secondary Attributes
-
Embedded
-
Primary Attributes
-
Other names
LM5069EVAL
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Connection Diagram
Ordering Information
Pin Descriptions
Pin #
Order Number
LM5069MMX-1
LM5069MMX-2
LM5069MM-1
LM5069MM-2
10
1
2
3
4
5
6
7
8
9
SENSE
TIMER
OVLO
Name
UVLO
GATE
GND
PWR
PGD
OUT
VIN
Under-voltage lockout
Power Good indicator
Positive supply input
Over-voltage lockout
Current sense input
Fault Response
Gate drive output
Timing capacitor
Output feedback
Auto Restart
Auto Restart
Power limit set
Circuit ground
Description
Latch Off
Latch Off
Applications Information
The voltage across the current sense resistor (R
pin. If the voltage across R
timer activates.
A small ceramic bypass capacitor close to this pin is recommended to suppress
transients which occur when the load current is switched off.
An external resistor divider from the system input voltage sets the under-voltage
turn-on threshold. An internal 21 µA current source provides hysteresis. The
enable threshold at the pin is 2.5V. This pin can also be used for remote shutdown
control.
An external resistor divider from the system input voltage sets the over-voltage
turn-off threshold. An internal 21 µA current source provides hysteresis. The
disable threshold at the pin is 2.5V.
An external capacitor connected to this pin sets the insertion time delay and the
Fault Timeout Period. The capacitor also sets the restart timing of the LM5069-2.
An external resistor connected to this pin, in conjunction with the current sense
resistor (R
pass MOSFET.
An open drain output. When the external MOSFET V
the PGD indicator is active (high). When the external MOSFET V
above 2.5V the PGD indicator switches low.
Connect to the output rail (external MOSFET source). Internally used to determine
the MOSFET V
Connect to the external MOSFET’s gate. This pin's voltage is typically 12V above
the OUT pin when enabled.
Package Type
MSOP-10
10-Lead MSOP
S
Top View
), sets the maximum power dissipation allowed in the external series
DS
2
voltage for power limiting, and to control the PGD indicator.
NSC Package Drawing
S
MUB10A
reaches 55mV the load current is limited and the fault
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S
) is measured from VIN to this
DS
decreases below 1.25V,
Supplied As
DS
increases

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