CP2400AB Silicon Laboratories Inc, CP2400AB Datasheet - Page 55

BOARD EVAL SPI LCD DRIVER CP2400

CP2400AB

Manufacturer Part Number
CP2400AB
Description
BOARD EVAL SPI LCD DRIVER CP2400
Manufacturer
Silicon Laboratories Inc
Datasheets

Specifications of CP2400AB

Main Purpose
LCD Development
Embedded
No
Utilized Ic / Part
CP2400
Primary Attributes
I²C, SMBus Interfaces
Secondary Attributes
Up to 128 segments
Product
Microcontroller Accessories
Core Processor
CP2400
Clock Speed
20 MHz
Interface Type
SPI
Timers
2
Operating Supply Voltage
1.8 V to 3.6 V
Cpu Core
CP2400
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
Other names
336-1857
9.6.
After waking from ULP Mode, the ULPST register may be used to determine the cause of wake up. The three pos-
sible wake up sources are SmaRTClock Alarm, SmaRTClock Oscillator Failure, and ULP Port Match. If none of the
bits in ULPST are set, then the wake up was due to the NSS or PWR pin falling edge.
This register may be cleared by writing a 1 to the CLEAR (MSCN.6) bit in the master control register.
SFR Definition 9.2. ULPST: Ultra Low Power Status Register
Address = 0x42
Name
Reset
7:3
Bit
Type
2
1
0
Bit
RTCALRM SmaRTClock Alarm Wake Up Indicator.
RTCFAIL
Determining the ULP Mode Wake-Up Source
Unused
ULPPM
Name
R
7
0
Read = 00000b. Write = Don’t Care.
SmaRTClock Oscillator Fail Wake Up Indicator.
0: Source of last wake up was not a SmaRTClock Oscillator Fail.
1: Source of last wake up was a SmaRTClock Oscillator Fail.
0: Source of last wake up was not a SmaRTClock Alarm.
1: Source of last wake up was a SmaRTClock Alarm.
Ultra Low Power Port Match Wake Up Indicator.
0: Source of last wake up was not a ULP Port Match.
1: Source of last wake up was a ULP Port Match.
R
6
0
R
5
0
Rev. 1.0
R
4
0
Function
R
3
0
RTCFAIL
R
2
0
CP2400/1/2/3
RTCALRM
R
1
0
ULPPM
varies
R
0
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