ACS9510EVB Semtech, ACS9510EVB Datasheet - Page 3

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ACS9510EVB

Manufacturer Part Number
ACS9510EVB
Description
EVALUATION BOARD FOR ACS9510
Manufacturer
Semtech
Series
ToPSync™r
Datasheet

Specifications of ACS9510EVB

Main Purpose
Timing, Timing-over-Packet Synchronization
Embedded
No
Utilized Ic / Part
ACS9510
Primary Attributes
Precision Time Protocol (PTP)
Secondary Attributes
IEEE1588 Master/Slave
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
TDM timing
Paths T1 (line-recovered clocks) or T3 (station clocks) are used as reference sources to generate T0 (SEC or equipment clock)
and T4 (station clock) outputs locked to the selected reference source(s). The T0 and T4 clocks can be generated simultaneously
from separate references. All input frequencies are available to both clock paths, and any one input clock is chosen by a selector
in each path, where a priority table configured by external software controls which input clock is selected. Each input channel is
monitored for activity and frequency offset, input failure, and change of line status or SSM value. If the currently-selected input is
disqualified, it is dropped and the input with the next highest priority is automatically used. Noise-transfer, phase-transient-
generation, holdover, etc. are within standardized requirements. Protection switching guards the application against local and
remote failures.
PTP timing
In the PTP Network Timed and Reference Timed modes, the ACS9510 supports the timing requirements of generic packet
network applications. The device can act as a PTP Grandmaster or a PTP Slave. The selection between master or slave operation
can be automatic, or directly configured. In PTP Grandmaster operation, the ACS9510 communicates with a community of PTP
Slaves on the same network. The input reference port consists of input clocks and a UART port. The IPCLK ports are supplied with
a 1 PPS signal aligned to the external timebase. The UART port carries timing messages from the external time source. In PTP
Slave operation, the ACS9510 receives PTP timing messages from its master clock, timestamps the arrival of PTP event
messages, and filters the packet delay variation to deliver a timebase closely aligned to that of the master clock. Conventional
clock signals are also generated, with their rate of phase advancement locked to the timebase rate.
Outputs
The 19 output clocks [OPCLK18:0] are obtained by sophisticated multiplexing under the control of API calls. A wide range of
output clock frequencies is available. In PTP Network Timed and Reference Timed modes, the frequency of each output clock
OPCLK [15:0] is individually programmable via the API. In the TDM Timed mode, the frequency of each output clock OPCLK [7:0]
and OPCLK [18:16] is individually programmable via registers.
ACS9510PB_US, Revision 02, October 2008
©2008 Semtech Corp.
ADVANCED COMMS & SENSING
Block diagram of the ACS9510
Page 3
ACS9510 ToPSync™
FINAL PRODUCT BRIEF
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Hardware v 1.0

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