EVAL-ADM1068LQEBZ Analog Devices Inc, EVAL-ADM1068LQEBZ Datasheet - Page 21

• Manufacturer Part Number: EVAL-ADM1068LQEBZ
• Description: BOARD EVALUATION FOR ADM1068LQ
• Manufacturer: Analog Devices Inc

Specifications of EVAL-ADM1068LQEBZ

• Main Purpose: Power Management, Power Supply Supervisor/Tracker/Sequencer
• Embedded: No
• Utilized Ic / Part: ADM1068
• Primary Attributes: 10 Channel Supervisor / Sequencer, 6 Voltage Output DACs
• Secondary Attributes: GUI Programmable via SMBus (via USB)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

SMBus PROTOCOLS FOR RAM AND EEPROM
The ADM1068 contains volatile registers (RAM) and nonvolatile
registers (EEPROM). User RAM occupies Address 0x00 to
Address 0xDF; the EEPROM occupies Address 0xF800 to
Address 0xFBFF.
Data can be written to and read from both the RAM and the
EEPROM as single data bytes. Data can be written only to
unprogrammed EEPROM locations. To write new data to a
programmed location, the location contents must first be erased.
EEPROM erasure cannot be done at the byte level. The EEPROM
is arranged as 32 pages of 32 bytes each, and an entire page
must be erased.
Page erasure is enabled by setting Bit 2 in the UPDCFG register
(Address 0x90) to 1. If this bit is not set, page erasure cannot
occur, even if the command byte (0xFE) is programmed across
the SMBus.
WRITE OPERATIONS
The SMBus specification defines several protocols for different
types of read and write operations. The following abbreviations
are used in Figure 28 to Figure 36:
•
•
•
•
•
•
S = Start
P = Stop
R = Read
W = Write
A = Acknowledge
A = No acknowledge
(CONTINUED)
(CONTINUED)
SDA
SCL
SDA
SCL
START BY
SDA
MASTER
SCL
P
t
1
BUF
1
S
1
D7
0
D6
SLAVE ADDRESS
0
t
LO W
t
HD; STA
FRAME 1
t
D5
HD; DAT
0
D4
1
DATA BYTE
t
FRAME 3
R
A1
D3
Figure 26. General SMBus Read Timing Diagram
A0
D2
Figure 27. Serial Bus Timing Diagram
t
R/W
SU; DAT
ACK. BY
D1
SLAVE
Rev. B | Page 21 of 24
9
D0
ACK. BY
MASTER
t
HI G H
t
F
1
9
D7
D6
1
The ADM1068 uses the following SMBus write protocols.
Send Byte
In a send byte operation, the master device sends a single
command byte to a slave device, as follows:
1.
2.
3.
4.
5.
6.
In the ADM1068, the send byte protocol is used for two
purposes:
•
•
D7
D5
D4
D6
S
To write a register address to the RAM for a subsequent
single byte read from the same address, or for a block read or
a block write starting at that address, as shown in Figure 28.
To erase a page of EEPROM memory. EEPROM memory
can be written to only if it is unprogrammed. Before writing
to one or more EEPROM memory locations that are already
programmed, the page(s) containing those locations must
first be erased. EEPROM memory is erased by writing a
command byte.
The master device asserts a start condition on SDA.
The master sends the 7-bit slave address followed by the
write bit (low).
The addressed slave device asserts an acknowledge (ACK)
on SDA.
The master sends a command code.
The slave asserts ACK on SDA.
The master asserts a stop condition on SDA and the
transaction ends.
DATA BYTE
FRAME 2
t
D3
D5
SU; STA
Figure 28. Setting a RAM Address for Subsequent Read
S
1
t
D2
D4
DATA BYTE
HD; STA
FRAME N
ADDRESS
SLAVE
D1
D3
2
MASTER
ACK. BY
D0
D2
W
9
D1
t
SU; STO
3
A
D0
NO ACK.
(0x00 TO 0xDF)
ADDRESS
9
RAM
4
P
MASTER
STOP
BY
5
A
ADM1068
P
6