AD9512/PCB Analog Devices Inc, AD9512/PCB Datasheet - Page 10

• Manufacturer Part Number: AD9512/PCB
• Description: BOARD EVAL CLOCK 5CHAN 48LFCSP
• Manufacturer: Analog Devices Inc

Specifications of AD9512/PCB

• Main Purpose: Timing, Clock Distribution
• Utilized Ic / Part: AD9512
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Secondary Attributes: -
• Embedded: -
• Primary Attributes: -
• Lead Free Status / Rohs Status: Not Compliant

AD9512
CLOCK OUTPUT ADDITIVE TIME JITTER
Table 5.
Parameter
LVPECL OUTPUT ADDITIVE TIME JITTER
LVDS OUTPUT ADDITIVE TIME JITTER
CLK1 = 622.08 MHz
CLK1 = 622.08 MHz
CLK1 = 400 MHz
CLK1 = 400 MHz
CLK1 = 400 MHz
CLK1 = 400 MHz
CLK1 = 400 MHz
CLK1 = 400 MHz
CLK1 = 400 MHz
CLK1 = 400 MHz
Any LVPECL (OUT0 to OUT2) = 622.08 MHz
Divide Ratio = 1
Any LVPECL (OUT0 to OUT2) = 155.52 MHz
Divide Ratio = 4
Any LVPECL (OUT0 to OUT2) = 100 MHz
Divide Ratio = 4
Any LVPECL (OUT0 to OUT2) = 100 MHz
Divide Ratio = 4
Other LVPECL = 100 MHz
Both LVDS (OUT3, OUT4) = 100 MHz
Any LVPECL (OUT0 to OUT2) = 100 MHz
Divide Ratio = 4
Other LVPECL = 50 MHz
Both LVDS (OUT3, OUT4) = 50 MHz
Any LVPECL (OUT0 to OUT2) = 100 MHz
Divide Ratio = 4
Other LVPECL = 50 MHz
Both CMOS (OUT3, OUT4) = 50 MHz (B Outputs Off)
Any LVPECL (OUT0 to OUT2) = 100 MHz
Divide Ratio = 4
Other LVPECL = 50 MHz
Both CMOS (OUT3, OUT4) = 50 MHz (B Outputs On)
LVDS (OUT3) = 100 MHz
Divide Ratio = 4
LVDS (OUT4) = 100 MHz
Divide Ratio = 4
LVDS (OUT3) = 100 MHz
Divide Ratio = 4
LVDS (OUT4) = 50 MHz
All LVPECL = 50 MHz
Rev. A | Page 10 of 48
Min
395
Typ
215
215
222
225
225
264
319
40
55
Max
Unit
fs rms
fs rms
fs rms
fs rms
fs rms
fs rms
fs rms
fs rms
fs rms
fs rms
Test Conditions/Comments
BW = 12 kHz − 20 MHz (OC-12)
BW = 12 kHz − 20 MHz (OC-3)
Calculated from SNR of ADC method;
F
Calculated from SNR of ADC method;
F
Interferer(s)
Interferer(s)
Calculated from SNR of ADC method;
F
Interferer(s)
Interferer(s)
Calculated from SNR of ADC method;
F
Interferer(s)
Interferer(s)
Calculated from SNR of ADC method;
F
Interferer(s)
Interferer(s)
Calculated from SNR of ADC method;
F
Calculated from SNR of ADC method;
F
Calculated from SNR of ADC method;
F
Interferer(s)
Interferer(s)
C
C
C
C
C
C
C
C
= 100 MHz with A
= 100 MHz with A
= 100 MHz with A
= 100 MHz with A
= 100 MHz with A
= 100 MHz with A
= 100 MHz with A
= 100 MHz with A
IN
IN
IN
IN
IN
IN
IN
IN
= 170 MHz
= 170 MHz
= 170 MHz
= 170 MHz
= 170 MHz
= 170 MHz
= 170 MHz
= 170 MHz