AD637-EVALZ Analog Devices Inc, AD637-EVALZ Datasheet - Page 8

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AD637-EVALZ

Manufacturer Part Number
AD637-EVALZ
Description
BOARD EVALUATION FOR AD637
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD637-EVALZ

Main Purpose
Interface, RMS to DC Converters
Utilized Ic / Part
AD637
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Secondary Attributes
-
Embedded
-
Primary Attributes
-
STANDARD CONNECTION
The AD637 is simple to connect for a majority of rms
measurements. In the standard rms connection shown in Figure 5,
only a single external capacitor is required to set the averaging
time constant. In this configuration, the AD637 computes the
true rms of any input signal. An averaging error, the magnitude
of which is dependent on the value of the averaging capacitor,
is present at low frequencies. For example, if the filter capacitor,
C
3 Hz. To measure ac signals, the AD637 can be ac-coupled by
adding a nonpolar capacitor in series with the input, as shown
in Figure 5.
4.7kΩ
The performance of the AD637 is tolerant of minor variations
in the power supply voltages; however, if the supplies used
exhibit a considerable amount of high frequency ripple, it is
advisable to bypass both supplies to ground through a 0.1 μF
ceramic disc capacitor placed as close to the device as possible.
The output signal range of the AD637 is a function of the
supply voltages, as shown in Figure 6. The output signal can be
used buffered or nonbuffered, depending on the characteristics
of the load. If no buffer is needed, tie the buffer input (Pin 1) to
common. The output of the AD637 is capable of driving 5 mA
into a 2 kΩ load without degrading the accuracy of the device.
AD637
AV
, is 4 μF, the error is 0.1% at 10 Hz and increases to 1% at
+V
S
1
2 NC
3 COMMON
4
5
6
7
BUFF IN
OUTPUT
OFFSET
CS
DEN
INPUT
dB OUTPUT
Figure 5. Standard RMS Connection
25kΩ
BIAS
SQUARER/
AD637
DIVIDER
ABSOLUTE
VALUE
25kΩ
BUFF
OUT
+V
C
–V
V
NC
AV
IN
S
S
14
NC
13
12
11
10
9
8
+
(OPTIONAL)
C
AV
+V
–V
V
OUT
S
S
V
IN
= V
Rev. K | Page 8 of 20
IN
2
CHIP SELECT
The AD637 includes a chip select feature that allows the user
to decrease the quiescent current of the device from 2.2 mA to
350 μA. This is done by driving CS, Pin 5, to below 0.2 V dc.
Under these conditions, the output goes into a high impedance
state. In addition to reducing the power consumption,
the outputs of multiple devices can be connected in parallel
to form a wide bandwidth rms multiplexer. Tie Pin 5 high to
disable the chip select.
OPTIONAL TRIMS FOR HIGH ACCURACY
The AD637 includes provisions for trimming out output offset
and scale factor errors resulting in significant reduction in the
maximum total error, as shown in Figure 7. The residual error is
due to a nontrimmable input offset in the absolute value circuit
and the irreducible nonlinearity of the device.
Referring to Figure 8, the trimming process is as follows:
• Offset trim: Ground the input signal (V
• Scale factor trim: Resistor R4 is inserted in series with the
give 0 V output from Pin 9. Alternatively, R1 can be adjusted
to give the correct output with the lowest expected value of V
input to lower the range of the scale factor. Connect the
desired full-scale input to V
signal, and trim Resistor R3 to give the correct output at Pin 9
(that is, 1 V dc at the input results in a dc output voltage of
l.000 V dc). A 2 V p-p sine wave input yields 0.707 V dc at the
output. Remaining errors are due to the nonlinearity.
20
15
10
5
0
0
Figure 6. Maximum V
±3
SUPPLY VOLTAGE – DUAL SUPPLY (V)
±5
IN
, using either a dc or a calibrated ac
OUT
±10
vs. Supply Voltage
IN
) and adjust R1 to
±15
±18
IN
.

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