EVB-USB2514Q36-BAS SMSC, EVB-USB2514Q36-BAS Datasheet - Page 57

BOARD EVAL FOR USB2514/USB2514I

EVB-USB2514Q36-BAS

Manufacturer Part Number
EVB-USB2514Q36-BAS
Description
BOARD EVAL FOR USB2514/USB2514I
Manufacturer
SMSC

Specifications of EVB-USB2514Q36-BAS

Main Purpose
Interface, USB 2.0 Hub
Embedded
No
Utilized Ic / Part
USB2514, USB2514I
Primary Attributes
Quad Port Hub, High Speed (480Mbps), I2C/SMBus
Secondary Attributes
Overcurrent Protection, Port Power Switching, ESD Protection
Interface Type
USB
Operating Supply Voltage
5 V
Product
Interface Modules
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
USB2514
Other names
638-1043
EVB-USB2514Q36-BAS (USB2514/USB2514I)

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EVB-USB2514Q36-BAS
Manufacturer:
Standard
Quantity:
1
USB 2.0 Hi-Speed Hub Controller
Datasheet
SMSC USB251x
RESET_N
Strap Pins
8.7
8.7.1
8.7.1.1
VSS
VSS
Hardware
asserted
reset
Don’t Care
USB2513/13i and USB2514/14i Only: The LED_A[x:1]_N pins are sampled after RESET_N negation,
and the logic values are used to configure the hub if the internal default configuration mode is selected.
The implementation shown in
configured with a "Strap High" configuration, the LED functions with active low signaling, and the PAD
will "sink" the current from the external supply. When a pin is configured with a "Strap Low"
configuration, the LED functions with active high signaling, and the PAD will source the current to the
external LED.
There are two different resets that the hub experiences. One is a hardware reset via the RESET_N
pin and the second is a USB Bus Reset.
External Hardware RESET_N
A valid hardware reset is defined as assertion of RESET_N for a minimum of 1 μs after all power
supplies are within operating range. While reset is asserted, the hub (and its associated external
circuitry) consumes less than 500 μA of current from the upstream USB power source.
Assertion of RESET_N (external pin) causes the following:
1. All downstream ports are disabled, and PRTPWR power to downstream devices is removed (unless
2. The PHYs are disabled, and the differential pairs will be in a high-impedance state.
3. All transactions immediately terminate; no states are saved.
4. All internal registers return to the default state (in most cases, 00(h)).
5. The external crystal oscillator is halted.
6. The PLL is halted.
The hub is “operational” 500 μs after RESET_N is negated. Once operational, the hub immediately
reads OEM-specific data from the external EEPROM (if the SMBus option is not disabled).
RESET_N for Strapping Option Configuration
Reset
BC_EN is enabled).
Read Strap
t1
Options
Figure 8.6 Reset_N Timing for Default/Strap Option Mode
t2
Valid
t3
Don’t Care
t4
Figure 8.5
Drive Strap
Outputs to
inactive
levels
DATASHEET
t5
57
shows a recommended passive scheme. When a pin is
Upstream
Attach
USB
Driven by Hub if strap is an output.
USB Reset
recovery
t6
t7
Idle
Revision 1.1 (04-26-10)
t8
completion
response
request
Start

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