KSZ8893MQL-EVAL Micrel Inc, KSZ8893MQL-EVAL Datasheet - Page 61

EVAL KIT EXPERIMENTAL KSZ8893MQL

KSZ8893MQL-EVAL

Manufacturer Part Number
KSZ8893MQL-EVAL
Description
EVAL KIT EXPERIMENTAL KSZ8893MQL
Manufacturer
Micrel Inc
Datasheet

Specifications of KSZ8893MQL-EVAL

Main Purpose
Interface, Ethernet Controller (PHY and MAC)
Embedded
No
Utilized Ic / Part
KSZ8893MQL
Primary Attributes
3 Ports, 100BASE-TX/100BASE-FX/10BASE-T, Managed
Secondary Attributes
MII, RMII, SNI, Auto MDI, MDI-X Auto Polarity Correction, LinkMD
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
576-1603
Register Map: Switch & PHY (8-bit registers)
Global Registers
Port Registers
Advanced Control Registers
Global Registers
Register 0 (0x00): Chip ID0
Register (Decimal)
0-1
2-15
Register (Decimal)
16-29
30-31
32-45
46-47
48-57
58-62
63
64-95
Register (Decimal)
96-111
112-117
118-120
121-122
123-131
132
133
134-137
138
139
140-141
Bit
7-0
December 2007
Name
Family ID
Register (Hex)
0x00-0x01
0x02-0x0F
Register (Hex)
0x10-0x1D
0x1E-0x1F
0x20-0x2D
0x2E-0x2F
0x30-0x39
0x3A-0x3E
0x3F
0x40-0x5F
Register (Hex)
0x60-0x6F
0x70-0x75
0x76-0x78
0x79-0x7A
0x7B-0x83
0x84
0x85
0x86-0x89
0x8A
0x8B
0x8C-0x8D
R/W
RO
Description
Chip family
Description
Chip ID Registers
Global Control Registers
Description
Port 1 Control Registers, including MII PHY Registers
Port 1 Status Registers, including MII PHY Registers
Port 2 Control Registers, including MII PHY Registers
Port 2 Status Registers, including MII PHY Registers
Port 3 Control Registers
Reserved
Port 3 Status Register
Reserved
Description
TOS Priority Control Registers
Switch Engine’s MAC Address Registers
User Defined Registers
Indirect Access Control Registers
Indirect Data Registers
Digital Testing Status Register
Digital Testing Control Register
Analog Testing Control Registers
Analog Testing Status Register
Analog Testing Control Register
QM Debug Registers
61
Default
0x88
M9999-121007-1.5

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