KSZ8842-16MQL-EVAL Micrel Inc, KSZ8842-16MQL-EVAL Datasheet - Page 51
KSZ8842-16MQL-EVAL
Manufacturer Part Number
KSZ8842-16MQL-EVAL
Description
BOARD EVALUATION KSZ8842-16MQL
Manufacturer
Micrel Inc
Specifications of KSZ8842-16MQL-EVAL
Main Purpose
Interface, Ethernet Controller (PHY and MAC)
Embedded
No
Utilized Ic / Part
KSZ8842-16MQL
Primary Attributes
2 Ports, 100BASE-TX/10BASE-T, Managed
Secondary Attributes
8/16-Bit Interface, LinkMD Cable Diagnostics
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
576-1634
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CPU Interface I/O Registers
The KSZ8842M provides an EISA-like, ISA-like, or VLBUS-like bus interface for the CPU to access its internal I/O
registers. I/O registers serve as the address that the microprocessor uses when communicating with the device. This is
used for configuring operational settings, reading or writing control, status information, and transferring packets by reading
and writing through the packet data registers.
I/O Registers
Input/Output (I/O) registers are limited to 16 locations as required by most ISA bus-based systems; therefore, registers
are assigned to different banks. The last word of the I/O register locations (0xE - 0xF) is shared by all banks and can be
used to change the bank in use.
The following I/O Space Mapping Tables apply to 8, 16 or 32-bit bus products. Depending upon the bus interface used
and byte enable signals (BE[3:0]N control byte access), each I/O access can be performed as an 8-bit, 16-bit, or 32-bit
operation. (The KSZ8842M is not limited to 8/16-bit performance and 32-bit read/write are also supported).
Micrel, Inc.
October 2007
51
KSZ8842-16/32 MQL/MVL/MVLI/MBL
M9999-102207-1.9
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