KSZ8041TL-EVAL Micrel Inc, KSZ8041TL-EVAL Datasheet - Page 54

BOARD EVALUATION KSZ8041TL

KSZ8041TL-EVAL

Manufacturer Part Number
KSZ8041TL-EVAL
Description
BOARD EVALUATION KSZ8041TL
Manufacturer
Micrel Inc
Datasheets

Specifications of KSZ8041TL-EVAL

Main Purpose
Interface, Ethernet PHY
Embedded
No
Utilized Ic / Part
KSZ8041TL
Primary Attributes
Single Chip PHY, 100BASE-TX/100BASE-FX/10BASE-T
Secondary Attributes
MII, RMII, HP Auto MDI, MDI-X Auto Polarity Correction, LinkMD
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
576-3295
KSZ8041TL-EVAL
Micrel, Inc.
KSZ8041TL/FTL
Reset Circuit
The following reset circuit is recommended for powering up the KSZ8041TL/FTL if reset is triggered by the power supply.
3.3V
D1: 1N4148
D1
R 10K
KSZ8041TL/FTL
RST#
C 10uF
Figure 21. Recommended Reset Circuit
The following reset circuit is recommended for applications where reset is driven by another device (e.g., CPU or FPGA).
At power-on-reset, R, C and D1 provide the necessary ramp rise time to reset the KSZ8041TL/FTL device. The
RST_OUT_n from CPU/FPGA provides the warm reset after power up.
3.3V
R 10K
D1
KSZ8041TL/FTL
CPU/FPGA
RST#
RST_OUT_n
D2
C 10uF
D1, D2: 1N4148
Figure 22. Recommended Reset Circuit for Interfacing with CPU/FPGA Reset Output
April 2007
54
M9999-042707-1.1

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