KSZ8851SNL-BBE-EVAL Micrel Inc, KSZ8851SNL-BBE-EVAL Datasheet - Page 49

• Manufacturer Part Number: KSZ8851SNL-BBE-EVAL
• Description: BOARD EVAL MAC/PHY FOR KSZ8851
• Manufacturer: Micrel Inc
• Series: LinkMD®r

Specifications of KSZ8851SNL-BBE-EVAL

• Design Resources: BeagleBoard Zippy2
• Main Purpose: Interface, Ethernet Controller (PHY and MAC)
• Embedded: No
• Utilized Ic / Part: KSZ8851SNL
• Primary Attributes: 1 Port, 100BASE-TX/10BASE-T
• Secondary Attributes: SPI Interface, LinkMD Cable Diagnostics
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 576-3602; KSZ8851SNL-BBE-EVL; ZIPPY2

Receive Control Register 1 (0x74 – 0x75): RXCR1
This register holds control information programmed by the CPU to control the receive function.
August 2009
Micrel, Inc.
Bit
15-14
13
12
11-6
5-0
Bit
15
14
13
12
11
10
9
8
7
0x0
0x0
-
-
0x0
0x0
0x0
0x0
0x1
0x0
0x0
0x0
0x0
Default Value
0x0
Default Value
R/W
RO
RO
RO
RO
RO
R/W
RW
RW
RW
RW
RW
RW
RW
RW
RW
Description
Reserved
TXLC Transmit Late Collision
This bit is set when a transmit Late Collision occurs.
TXMC Transmit Maximum Collision
This bit is set when a transmit Maximum Collision is reached.
Reserved
TXFID Transmit Frame ID
This field identifies the transmitted frame. All of the transmit status information in this
register belongs to the frame with this ID.
Description
FRXQ Flush Receive Queue
When this bit is set, The receive queue memory is cleared and RX frame pointer is reset.
Note: Disable the RXE receive enable bit[0] first before set this bit, then clear this bit to
normal operation.
RXUDPFCC Receive UDP Frame Checksum Check Enable
When this bit is set, the KSZ8851SNL will check for correct UDP checksum for incoming
UDP frames. Any received UDP frames with incorrect checksum will be discarded.
RXTCPFCC Receive TCP Frame Checksum Check Enable
When this bit is set, the KSZ8851SNL will check for correct TCP checksum for incoming
TCP frames. Any received TCP frames with incorrect checksum will be discarded.
RXIPFCC Receive IP Frame Checksum Check Enable
When this bit is set, the KSZ8851SNL will check for correct IP header checksum for
incoming IP frames. Any received IP frames with incorrect checksum will be discarded.
RXPAFMA Receive Physical Address Filtering with MAC Address Enable
When this bit is set, this bit enables the RX function to receive physical address that pass
the MAC address filtering mechanism (see Address Filtering Scheme in Table 3 for
detail).
RXFCE Receive Flow Control Enable
When this bit is set and the KSZ8851SNL is in full-duplex mode, flow control is enabled,
and the KSZ8851SNL will acknowledge a PAUSE frame from the receive interface; i.e.,
the outgoing packets are pending in the transmit buffer until the PAUSE frame control
timer expires. This field has no meaning in half-duplex mode and should be programmed
to 0.
When this bit is cleared, flow control is not enabled.
RXEFE Receive Error Frame Enable
When this bit is set, CRC error frames are allowed to be received into the RX queue.
When this bit is cleared, all CRC error frames are discarded.
RXMAFMA Receive Multicast Address Filtering with MAC Address Enable
When this bit is set, this bit enables the RX function to receive multicast address that pass
the MAC address filtering mechanism (see Address Filtering Scheme in Table 3 for
detail).
RXBE Receive Broadcast Enable
When this bit is set, the RX module receives all the broadcast frames.
49
KSZ8851SNL/SNLI
M9999-083109-2.0