C8051T606ZDB Silicon Laboratories Inc, C8051T606ZDB Datasheet - Page 29

CARD DAUGHTER QFN10 SOCKET

C8051T606ZDB

Manufacturer Part Number
C8051T606ZDB
Description
CARD DAUGHTER QFN10 SOCKET
Manufacturer
Silicon Laboratories Inc
Datasheets

Specifications of C8051T606ZDB

Module/board Type
Socket Module - QFN
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
C8051T606
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1668
Notes:
General
Solder Mask Design
Stencil Design
Card Assembly
Dimension
1. All dimensions shown are in millimeters (mm) unless otherwise noted.
2. Dimensioning and Tolerancing is per the ANSI Y14.5M-1994 specification.
3. This Land Pattern Design is based on IPC-SM-782 guidelines.
4. All dimensions shown are at Maximum Material Condition (MMC). Least Material Condition
5. All metal pads are to be non-solder mask defined (NSMD). Clearance between the solder
6. A stainless steel, laser-cut and electro-polished stencil with trapezoidal walls should be used
7. The stencil thickness should be 0.125 mm (5 mils).
8. The ratio of stencil aperture to land pad size should be 1:1 for the perimeter pads.
9. A No-Clean, Type-3 solder paste is recommended.
10. The recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification for
(LMC) is calculated based on a Fabrication Allowance of 0.05mm.
mask and the metal pad is to be 60 m minimum, all the way around the pad.
to assure good solder paste release.
Small Body Components.
C1
C2
e
Table 7.2. QFN-10 PCB Land Pattern Dimensions
Figure 7.2. QFN-10 PCB Land Pattern
1.70
1.70
Min
0.50 BSC.
Max
1.80
1.80
Rev. 1.2
Dimension
C8051T600/1/2/3/4/5/6
X1
Y1
0.20
0.85
Min
Max
0.30
0.95
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