Z8F64210100ZDA Zilog, Z8F64210100ZDA Datasheet - Page 143
Z8F64210100ZDA
Manufacturer Part Number
Z8F64210100ZDA
Description
ADAPTER ICE Z8 ENCORE 64K 44LQFP
Manufacturer
Zilog
Specifications of Z8F64210100ZDA
Module/board Type
*
For Use With/related Products
Z8 Encore!™
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
269-3400
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PS019921-0308
Input Sample Time
(CLKPOL = 0)
(CLKPOL = 1)
Transfer Format PHASE Equals Zero
Figure 24
The two SCK waveforms show polarity with CLKPOL reset to 0 and with CLKPOL set to
one. The diagram may be interpreted as either a Master or Slave timing diagram because
the SCK Master-In/Slave-Out (MISO) and Master-Out/Slave-In (MOSI) pins are directly
connected between the Master and the Slave.
Transfer Format PHASE Equals One
Figure 25
one. Two waveforms are depicted for SCK, one for CLKPOL reset to 0 and another for
CLKPOL set to 1.
MOSI
MISO
SCK
SCK
SS
displays the timing diagram for an SPI transfer in which PHASE is cleared to 0.
on page 130 displays the timing diagram for an SPI transfer in which PHASE is
Bit7
Bit7
Figure 24. SPI Timing When PHASE is 0
Bit6
Bit6
Bit5
Bit5
Bit4
Bit4
Bit3
Bit3
Z8 Encore! XP
Bit2
Bit2
Bit1
Bit1
Product Specification
Serial Peripheral Interface
Bit0
Bit0
®
F64XX Series
129
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