Z86CCP00ZAC Zilog, Z86CCP00ZAC Datasheet - Page 7

Z8 ACCESSORY KIT (28-DIP,40-DIP)

Z86CCP00ZAC

Manufacturer Part Number
Z86CCP00ZAC
Description
Z8 ACCESSORY KIT (28-DIP,40-DIP)
Manufacturer
Zilog
Datasheets

Specifications of Z86CCP00ZAC

Module/board Type
Socket Module - DIP
For Use With/related Products
Zilog Emulators/Programmers
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
269-2001
Zilog
21. SCLK/16 Mode of SMR register is not supported.
Z86C03/C06/C16
1. Devices with the comparator output feature have the
2. The register %F8(P01M register) bits D4 and D3 must
3. WDT Register (F) %0F can only be written in the first
4. The PCON register on Z86C16 is not reset after Stop-
5. The SPI functions are not supported.
6. When using the emulator to emulate the C06, the
Z86C02/C04/C08/E02/E04/E08
1. The register %F8(P01M register) bits D4 and D3 must
2. The Emulation Rising Edge of P32 in Digital Mode. For
3. Stop Mode. P27 is used to release Stop Mode.
CP97Z8X5301
The Emulation Rising Edge of P32 in Analog Mode.
LD RP, #%0F
LD %0B, #00110100B
This code must be removed before final ROM code
submission or OTP programming. Note that P27 must
For Z86C02/04/08 emulation, the IRQ3 rising edge in-
terrupt on P32 is not supported. To implement the ris-
ing edge of P32, a jumper from P37 must be connect-
ed to Pin 1 of U27 74HCT04. Another jumper must
connect the output of the 74HCT04 Pin 2 to P30 on
emulation socket P3, Pin 25 or emulation socket P2,
Pin 18. The PCON bit D0 must be set to state “1”.
P32 comparator output coming out of P35.
be set to state “0” and bit D2 must be set to state “1”.
60 internal system clocks from the start of program
execution.
Mode Recovery.
comparator outputs are at P34 and P37, which is
different than the C06, which is at P34 and P35.
be set to state “0” and bit D2 must be set to state “1”.
Z86C02/04/08 emulation, the IRQ3 rising edge
interrupt on P32 is not supported. To implement the
rising edge of P32, a jumper from P32 must be
connected to Pin 1 of U27 74HCT04. Another jumper
must connect the output of the 74HCT04 Pin 2 to P30
on emulation socket P3, Pin 25 or emulation socket
P2, Pin 18.
However, since the CCP emulator (C50 ICE Chip) is
used, you must write to SMR(F)0B 101 in D2, D3, and
D4. Use the following code:
;select Bank F
;selects P27 as the Stop-
;Mode Recovery pin.
4. Watch-Dog Timer (WDT) running in Stop Mode is not
5. Z86C02/04/08 do not support WDT register. Use the
6. The register %FA (IRQ register) bits D7 and D6 must
Z86C30/C31/C32/C33/233/E30/E31/E33/733
1. Devices with the comparator output feature have the
2. The register %F8(P01M register) bits D4 and D3 must
3. WDT Register (F) %0F can only be written in the first
4. Reg(F)%00 PCON has D2 controlling the open-drain
5. The “No Auto Latch” feature is not implemented.
6. Does
Z86C40/C43/C50/C89/C90/243/E40/E43/743
1. Devices with the comparator output feature have the
2. WDT Register (F) %0F can only be written in the first
3. Reg(F)%00 PCON has D2 controlling the open-drain
4. The “No Auto Latch” feature is not implemented.
5. To emulate the Z86C89/90, select the ‘Z86C40/E40’
6. Does not emulate clock-free WDT reset for Z86C43.
be in Input Mode, which is accomplished with the
following code:
LD P2M, #1xxxxxxxB
NOP
Stop
supported.
command “4F” to run WDT in Halt Mode.
be set to state “0”.
P32 comparator output coming out of P37.
be set to state “0” and bit D2 must be set to state “1”.
60 internal system clocks from the start of program
execution.
for Port 0 and D1 controlling the open-drain for Port 1.
Z86C33/233.
P32 comparator output coming out of P37.
60 internal system clocks from the start of program
execution.
for Port 0 and D1 controlling the open-drain for Port 1.
option from the “Microcontroller” pull-down window of
the Configuration dialog box, which appears when the
Z8 CCP GUI starts up and when the Configuration
Menu item is selected from the ICEBOX Menu.
not
emulate
Z8® CCP™ In-Circuit Emulator
clock-free
;clears pipeline
;halts processor
WDT
reset
for
7
1

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