CMOD232+ Maxim Integrated Products, CMOD232+ Datasheet - Page 21

• Manufacturer Part Number: CMOD232+
• Description: EVAL SYSTEM FOR MAX9850
• Manufacturer: Maxim Integrated Products

Specifications of CMOD232+

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

For example:
f
N
Table 8 shows recommended CP(4:0) values for typical
MCLK frequencies.
Eleven internal registers program and report the status
of the MAX9850. Table 9 lists all of the registers, their
addresses, and power-on-reset state. Registers 0x0
and 0x1 are read-only while all of the other registers are
read/write. Register 0xB is reserved for factory testing.
Table 9. Register Map
X = Don’t Care.
MCLK
LRCLK MSB
LRCLK LSB
REGISTER
CP(4:0)
Status A
Status B
Purpose
Interrupt
General
Volume
Charge
Enable
Enable
Digital
Pump
Audio
Clock
Registers and Bit Descriptions
= 12MHz, SF = 1, and f
= 9.
ALERT
SHDN
MUTE
MAS
INT
B7
X
0
0
GM(1:0)
______________________________________________________________________________________
SR(1:0)
MCLKEN
ISGPIO
SGPIO
SLEW
INV
B6
X
0
Stereo Audio DAC with DirectDrive
BCINV
ILCK
GPD
LCK
B5
X
0
0
CPEN(1:0)
CP
RESERVED
SMONO
= 666.7kHz,
ISHPS
SHPS
LSF
B4
DBDEL(1:0)
0
LSB(7:0)
MSB(14:8)
HPEN
IVMN
VMN
SHP
DLY
B3
VOL(5:0)
IC(1:0)
LNOEN
CP(4:0)
MONO
SLO
RTJ
Table 8. Recommended CP(4:0) Values
for Typical MCLK Frequencies
B2
1
0
11.2896
12.0000
12.2880
13.0000
24.0000
27.0000
f
(MHz)
MCLK
Headphone Amplifier
LNIEN
IOHL
SLI
B1
0
0
0
WS(1:0)
CP(4:0)
0x0A
0x08
0x09
0x09
0x09
0x07
DACEN
SDAC
ZDEN
IOHR
IIOH
B0
0
IC(1:0)
0x0
0x0
0x0
0x0
0x1
0x2
REGISTER
ADDRESS
0x0
0x1
0x2
0x3
0x4
0x5
0x6
0x7
0x8
0x9
0xA
0xB
SF
1
1
1
1
2
3
RESET STATE
POWER-ON
0x0C
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
—
—
—
(kHz)
705.6
666.7
682.7
650.0
666.7
642.9
f
CP
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