DM-COP8/44P National Semiconductor, DM-COP8/44P Datasheet - Page 124
DM-COP8/44P
Manufacturer Part Number
DM-COP8/44P
Description
CABLE FOR DEBUG MODULE 44-PLCC
Manufacturer
National Semiconductor
Datasheet
1.DM-COP820D.pdf
(254 pages)
Specifications of DM-COP8/44P
Accessory Type
44-PLCC Target Cable
For Use With/related Products
MetaLink Debug Module
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
*DM-COP8/44P
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Syntax:
Description:
Operation:
2-86
JSRL ADDR
Instruction Addressing Mode
COP8SAx7 MICROCONTROLLER
JSRL ADDR
The JSRL instruction allows the subroutine to be located anywhere in
the 32-Kbyte program memory space. The instruction pushes the return
address onto the software stack in data memory and then jumps to the
subroutine address.
The contents of PCL (Lower 8 bits of PC) are transferred to the data
memory location referenced by SP (Stack Pointer). SP is then decre-
mented, followed by the contents of PCU (Upper 7 bits of PC) being
transferred to the new data memory location referenced by SP. The re-
turn address is now saved on the software stack in data memory RAM.
Then SP is again decremented to set up the software stack reference for
the next subroutine.
Next, the values found in the second and third bytes of the instruction
are transferred to PCU and PCL respectively. The program then jumps
to the program memory location accessed by PC.
[SP] <- PCL
[SP - 1] <- PCU
[SP - 2]: SET UP FOR NEXT STACK REFERENCE
PC14-8 <- HIADDR (SECOND BYTE OF INSTRUCTION)
PC7-0 <- LOADDR (THIRD BYTE OF INSTRUCTION)
Absolute
Instruction
Cycles
5
Bytes
3
Hex Op Code
AD/HIADDR/
LOADDR
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