ZUSBOPTSC01ZAC Zilog, ZUSBOPTSC01ZAC Datasheet - Page 53

• Manufacturer Part Number: ZUSBOPTSC01ZAC
• Description: KIT ACC OPTO-ISO USB SMART CABLE
• Manufacturer: Zilog

Specifications of ZUSBOPTSC01ZAC

• Accessory Type: Opto-isolated USB Smart Cable
• Interface Type: USB
• Operating Supply Voltage: 5 V
• Product: Interface Modules
• For Use With/related Products: Z8 Encore! Dev. Kits
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 269-2287

PS020823-0208
Stop Mode Recovery
Stop Mode Recovery Register (SMR)
This register selects the clock divide value and determines the mode of Stop Mode Recov-
ery (see
bit that is hardware set on the condition of Stop recovery and reset by a power-on cycle.
Bit 6 controls whether a low level or a high level at the XOR-gate input (see
page 52) is required from the recovery source. Bit 5 controls the reset delay after recovery.
Bits D2, D3, and D4 of the SMR register specify the source of the Stop Mode Recovery
signal. Bits D0 determines if SCLK/TCLK are divided by 16 or not. The SMR is located
in Bank F of the Expanded Register Group at address
SMR(0F)0Bh
D7
*Default after Power-On Reset or Watchdog Reset
* *Default setting after Reset and Stop Mode Recovery.
* * *At the XOR gate input
* * * *Default setting after reset. Must be 1 if using a crystal or resonator clock source.
D6
Figure
D5
Figure 31. Stop Mode Recovery Register
31). All bits are write only except bit 7, which is read only. Bit 7 is a Flag
D4
D3
D2
D1
D0
SCLK/TCLK Divide-by-16
0 OFF * *
1 ON
Reserved (Must be 0)
Stop Mode Recovery Source
000 POR Only *
001 Reserved
010 P31
011 P32
100 P33
101 P27
110 P2 NOR 0-3
111 P2 NOR 0-7
Stop Delay
0 OFF
1 ON * * * *
Stop Recovery Level * * *
0 Low *
1 High
Stop Flag
0 POR *
1 Stop Recovery * *
0Bh
.
Product Specification
Crimzon
Functional Description
®
Figure 33
ZLP32300
on
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