LTM4614IV#PBF Linear Technology, LTM4614IV#PBF Datasheet - Page 6
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LTM4614IV#PBF
Manufacturer Part Number
LTM4614IV#PBF
Description
IC UMODULE DC/DC DUAL 4A 144LGA
Manufacturer
Linear Technology
Series
µModuler
Type
Point of Load (POL) Non-Isolatedr
Datasheet
1.LTM4614EVPBF.pdf
(20 pages)
Specifications of LTM4614IV#PBF
Design Resources
LTM4614 Spice Model
Output
0.8 ~ 5 V
Number Of Outputs
2
Power (watts)
12W
Mounting Type
Surface Mount
Voltage - Input
2.38 ~ 5.5 V
Package / Case
144-LGA
1st Output
0.8 ~ 5 VDC @ 4A
2nd Output
0.8 ~ 5 VDC @ 4A
Size / Dimension
0.59" L x 0.59" W x 0.11" H (15mm x 15mm x 2.8mm)
Power (watts) - Rated
12W
Operating Temperature
-40°C ~ 125°C
Efficiency
95%
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
3rd Output
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
PIN FUNCTIONS
LTM4614
V
Pins. Apply input voltage between these pins and GND
pins. Recommend placing input decoupling capacitance
directly between V
V
D9-D12, E9-E12, F9-F12): Power Output Pins. Apply out-
put load between these pins and GND pins. Recommend
placing output decoupling capacitance directly between
these pins and GND pins. Review Table 4.
GND1, GND2, (G1-G12, H1, H7-H12, J7-J8, K7-K8, L1,
L7-L8, M1-M8); (A1-A12, B1, B7-B12, C7-C8, D7-D8,
E1, E7-E8, F1-F8): Power Ground Pins for Both Input
and Output Returns.
TRACK1, TRACK2 (L3, E3): Output Voltage Tracking Pins.
When the module is confi gured as a master output, then a
soft-start capacitor is placed on the RUN/SS pin to ground
to control the master ramp rate, or an external ramp can
be applied to the master regulator’s track pin to control it.
Slave operation is performed by putting a resistor divider
from the master output to the ground, and connecting the
center point of the divider to this pin on the slave regulator.
If tracking is not desired, then connect the TRACK pin to
V
plications Information section.
6
OUT1
IN1
IN
. Load current must be present for tracking. See Ap-
, V
, V
IN2
OUT2
(J1-J6, K1-K6); (C1-C6, D1-D6): Power Input
(K9-K12, J9-J12, L9-L12, M9-M12); (C9-C12,
IN
pins and GND pins.
FB1, FB2 (L6, E6): The Negative Input of the Switching
Regulators’ Error Amplifi er. Internally, these pins are con-
nected to V
output voltages can be programmed with an additional
resistor between the FB and GND pins. Two power modules
can current share when this pin is connected in parallel
with the adjacent module’s FB pin. See Applications In-
formation section.
COMP1, COMP2 (L5, E5): Current Control Threshold
and Error Amplifi er Compensation Point. The current
comparator threshold increases with this control voltage.
Two power modules can current share when this pin is
connected in parallel with the adjacent module’s COMP
pin. Each channel has been internally compensated. See
Applications Information section.
PGOOD1, PGOOD2 (L4, E4): Output Voltage Power
Good Indicator. Open-drain logic output that is pulled to
ground when the output voltage is not within ±7.5% of
the regulation point.
RUN/SS1, RUN/SS2 (L2, E2): Run Control and Soft-Start
Pin. A voltage above 0.8V will turn on the module, and below
0.5V will turn off the module. This pin has a 1M resistor
to V
Information section for soft-start information.
SW1, SW2 (H2-H6, B2-B6): The switching node of the
circuit is used for testing purposes. This can be connected to
copper on the board for improved thermal performance.
IN
and a 1000pF capacitor to GND. See Applications
OUT
with a 4.99k precision resistor. Different
4614fa