LTM4603EV#PBF Linear Technology, LTM4603EV#PBF Datasheet - Page 10

• Manufacturer Part Number: LTM4603EV#PBF
• Description: IC DC/DC UMODULE 6A 118-LGA
• Manufacturer: Linear Technology
• Series: µModuler
• Type: Point of Load (POL) Non-Isolatedr

Specifications of LTM4603EV#PBF

• Design Resources: LTM4603 Spice Model
• Output: 0.6 ~ 5 V
• Number Of Outputs: 1
• Power (watts): 30W
• Mounting Type: Surface Mount
• Voltage - Input: 4.5 ~ 20V
• Package / Case: 118-LGA
• 1st Output: 0.6 ~ 5 VDC @ 6A
• Size / Dimension: 0.59" L x 0.59" W x 0.11" H (15mm x 15mm x 2.8mm)
• Power (watts) - Rated: 30W
• Operating Temperature: -40°C ~ 85°C
• Efficiency: 93%
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• 3rd Output: -
• 2nd Output: -

LTM4603/LTM4603-1
APPLICATIONS INFORMATION
The typical LTM4603 application circuit is shown in
Figure 18. External component selection is primarily
determined by the maximum load current and output
voltage. Refer to Table 2 for specifi c external capacitor
requirements for a particular application.
V
There are restrictions in the maximum V
down ratio that can be achieved for a given input voltage.
These constraints are shown in the Typical Performance
Characteristics curves labeled V
Ratio. Note that additional thermal derating may apply. See
the Thermal Considerations and Output Current Derating
section of this data sheet.
Output Voltage Programming and Margining
The PWM controller has an internal 0.6V reference voltage.
As shown in the Block Diagram, a 1M and a 60.4k 0.5%
internal feedback resistor connects V
together. The V
and the 60.4k resistor. The 1M resistor is used to protect
against an output overvoltage condition if the V
pin is not connected to the output, or if the remote sense
amplifi er output is not connected to V
voltage will default to 0.6V. Adding a resistor R
V
Table 1. R
The MPGM pin programs a current that when multiplied
by an internal 10k resistor sets up the 0.6V reference ±
offset for margining. A 1.18V reference divided by the
RPGM resistor on the MPGM pin programs the current.
Calculate V
10
V
V
R
(kΩ)
IN
FB
(V)
OUT MARGIN
OUT
SET
V
to V
pin to SGND pin programs the output voltage:
OUT
(
Open
OUT
0.6
=
SET
0 6
OUT(MARGIN)
.
Standard 1% Resistor Values vs V
Step-Down Ratios
)
60.4
V
=
1.2
OUT_LCL
60 4
%
100
.
V
R
OUT
40.2
1.5
k R
SET
+
:
pin is connected between the 1M
•
SET
V
30.1
1.8
OUT
25.5
IN
2
to V
OUT_LCL
OUT
19.1
2.5
IN
OUT
OUT
and V
and V
. The output
SET
13.3
Step-Down
3.3
OUT
from the
OUT_LCL
FB
8.25
step
pins
5
where %V
and V
where R
pin to ground.
The output margining will be ± margining of the value.
This is controlled by the MARG0 and MARG1 pins. See
the truth table below:
Input Capacitors
LTM4603 module should be connected to a low AC imped-
ance DC source. Input capacitors are required to be placed
adjacent to the module. In Figure 18, the 10μF ceramic input
capacitors are selected for their ability to handle the large
RMS current into the converter. An input bulk capacitor
of 100μF is optional. This 100μF capacitor is only needed
if the input source impedance is compromised by long
inductive leads or traces.
For a buck converter, the switching duty-cycle can be
estimated as:
Without considering the inductor current ripple, the RMS
current of the input capacitor can be estimated as:
In the above equation, η% is the estimated effi ciency of
the power module. C
aluminum capacitor, OS-CON capacitor or high volume
ceramic capacitor. Note the capacitor ripple current ratings
are often based on temperature and hours of life. This
makes it advisable to properly derate the input capacitor,
I
R
D
CIN RMS
PGM
=
OUT(MARGIN)
MARG1
(
V
HIGH
HIGH
LOW
LOW
V
PGM
OUT
=
IN
OUT
)
V
0 6
=
OUT
.
is the resistor value to place on the MPGM
is the percentage of V
I
V
OUT MAX
•
η
is the margin quantity in volts:
(
V
%
OUT MARGIN
IN
1 18
can be a switcher-rated electrolytic
)
.
(
•
MARG0
HIGH
HIGH
LOW
LOW
V
D
• –
(
)
1
•
OUT
10
D
k
)
you want to margin,
MARGIN DOWN
NO MARGIN
MARGIN UP
NO MARGIN
MODE
4603fa