HFBR-5961ALZ Avago Technologies US Inc., HFBR-5961ALZ Datasheet - Page 4

TXRX MMF FE SONET OC-3 2X5

HFBR-5961ALZ

Manufacturer Part Number
HFBR-5961ALZ
Description
TXRX MMF FE SONET OC-3 2X5
Manufacturer
Avago Technologies US Inc.
Series
-r
Datasheet

Specifications of HFBR-5961ALZ

Data Rate
155MBd
Wavelength
1300nm
Applications
Ethernet
Voltage - Supply
2.97 V ~ 3.63 V
Connector Type
LC Duplex
Mounting Type
Through Hole
Function
Transceivers for ATM, FDDI, Fast Ethernet and SONET OC-3/SDH STM-1 with LC connector.
Product
Transceiver
Maximum Rise Time
3 ns/2.2 ns
Maximum Fall Time
3 ns/2.2 ns
Pulse Width Distortion
0.4 ns/0.3 ns
Maximum Output Current
50 mA
Operating Supply Voltage
2.97 V to 3.63 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Package / Case
DIP With Connector
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
Multimode Glass
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HFBR-5961ALZ
Manufacturer:
Avago Technologies
Quantity:
135
Recommended Handing Precautions
Avago recommends that normal status precautions be
taken in the handling and assembly of these transceiv-
ers to prevent damage which may be induced by elec-
trostatic discharge (ESD). The HFBR-5961xxZ series of
transceivers meet MIL-STD-883C Method 3015.4 Class 2
products.
Care should be used to avoid shorting the receiver data
or signal detect outputs directly to ground without
proper current limiting impedance.
Solder and Wash Process Compatibility
The transceivers are delivered with protective process
plugs inserted into the LC receptacle.
This process plug protects the optical subassemblies
during wave solder and aqueous wash processing and
acts as a dust cover during shipping.
These transceivers are compatible with either industry
standard wave or hand solder processes.
Figure 3. Recommended Decoupling and Termination Circuits
4
T X
R X
Notes:
C1 = C2 = C3 = 10 nF or 100 nF
* Loading of R1 is optional.
TRANSCEIVER INPUTS
10
1
TERMINATE AT
2
9
3
8
130 Ω
4
100 Ω
7
5
6
130 Ω
C2
C1
1 µH
1 µH
Z = 50 Ω
Z = 50 Ω
V CC (+3.3 V)
C3
Z = 50 Ω
Z = 50 Ω
Z = 50 Ω
10 µF
Shipping Container
The transceiver is packaged in a shipping container
designed to protect it from mechanical and ESD
damage during shipment of storage.
Board Layout - Decoupling Circuit, Ground Planes and Termi-
nation Circuits
It is important to take care in the layout of your circuit
board to achieve optimum performance from these
transceivers. Figure 3 provides a good example of a
schematic for a power supply decoupling circuit that
works will with these parts, It is further recommend-
ed that a contiguous ground plane be provided in the
circuit board directly under the transceiver to provide
a low inductance ground for signal return current.
This recommendation is in keeping with good high
frequency board layout practices. Figures 3 and 4 show
two recommended termination schemes.
130 Ω
130 Ω
V CC (+3.3 V)
82 Ω
DEVICE INPUTS
TERMINATE AT
100 Ω
130 Ω
TD-
TD+
RD+
RD-
SD
LVTTL
V CC (+3.3 V)
PHY DEVICE
LVPECL
LVPECL
V CC (+3.3 V)

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