MT16HTS25664HY-667A1 Micron Technology Inc, MT16HTS25664HY-667A1 Datasheet - Page 13
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MT16HTS25664HY-667A1
Manufacturer Part Number
MT16HTS25664HY-667A1
Description
MODULE DDR2 2GB 200SODIMM
Manufacturer
Micron Technology Inc
Specifications of MT16HTS25664HY-667A1
Memory Type
DDR2 SDRAM
Memory Size
2GB
Speed
667MT/s
Package / Case
200-SODIMM
Main Category
DRAM Module
Sub-category
DDR2 SDRAM
Module Type
200SODIMM
Device Core Size
64b
Organization
256Mx64
Total Density
2GByte
Chip Density
1Gb
Maximum Clock Rate
667MHz
Operating Supply Voltage (typ)
1.8V
Operating Current
1.176A
Number Of Elements
16
Operating Supply Voltage (max)
1.9V
Operating Supply Voltage (min)
1.7V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Pin Count
200
Mounting
Socket
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Table 11:
Table 12:
PDF: 09005aef821e5bf3/Source: 09005aef82198d54
HTS16C256x64H.fm - Rev. A 4/06 EN
Parameter/Condition
Parameter/Condition
Supply voltage
Input high voltage: Logic 1; All inputs
Inputl low voltage: Logic 0; All inputs
Output low voltage: I
Input leakage current: V
Output leakage current: V
Standby current:
Power supply current, READ: SCL clock frequency = 100 KHz
Power supply current, WRITE: SCL clock frequency = 100 KHz
SCL LOW to SDA data-out valid
Time the bus must be free before a new transition can start
Data-out hold time
SDA and SCL fall time
Data-in hold time
Start condition hold time
Clock HIGH period
Noise suppression time constant at SCL, SDA inputs
Clock LOW period
SDA and SCL rise time
SCL clock frequency
Data-in setup time
Start condition setup time
Stop condition setup time
WRITE cycle time
Serial Presence-Detect EEPROM DC Operating Conditions
All voltages referenced to V
Serial Presence-Detect EEPROM AC Operating Conditions
All voltages referenced to V
Notes:
OUT
IN
= 3mA
OUT
= GND to V
1. To avoid spurious START and STOP conditions, a minimum delay is placed between SCL = 1
2. This parameter is sampled.
3. For a reSTART condition, or following a WRITE cycle.
4. The SPD EEPROM WRITE cycle time (
= GND to V
and the falling or rising edge of SDA.
sequence to the end of the EEPROM internal erase/program cycle. During the WRITE cycle,
the EEPROM bus interface circuit is disabled, SDA remains HIGH due to pull-up resistor, and
the EEPROM does not respond to its slave address.
DD
SS
SS
DD
; V
; V
DDSPD
DDSPD
= +1.7V to +3.6V
= +1.7V to +3.6V
2GB: (x64, DR) 200-Pin DDR2 SDRAM SODIMM
13
Symbol
t
t
t
t
t
HD:DAT
HD:STA
SU:DAT
SU:STO
SU:STA
t
t
t
t
t
HIGH
LOW
f
WRC
t
t
WRC) is the time from a valid stop condition of a write
BUF
SCL
Symbol
AA
DH
t
t
V
t
R
F
I
Micron Technology, Inc., reserves the right to change products or specifications without notice.
DDSPD
I
V
I
V
V
I
CC
I
CC
I
LO
SB
OL
LI
IH
IL
W
R
Min
V
200
100
0.2
1.3
0.6
0.6
1.3
0.6
0.6
0
DDSPD
Min
0.10
0.05
–0.6
1.7
1.6
0.4
2
–
× 0.7
Serial Presence-Detect
Max
300
400
0.9
0.3
50
10
©2006 Micron Technology, Inc. All rights reserved.
V
V
DDSPD
DDSPD
Max
3.6
0.4
3
3
4
1
3
Units
KHz
+ 0.5
× 0.3
ms
µs
µs
ns
ns
µs
µs
µs
ns
µs
µs
ns
µs
µs
Notes
Units
mA
mA
µA
µA
µA
V
V
V
V
1
2
2
3
4