MT9HTF6472FY-667B4E3 Micron Technology Inc, MT9HTF6472FY-667B4E3 Datasheet
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MT9HTF6472FY-667B4E3
Specifications of MT9HTF6472FY-667B4E3
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MT9HTF6472FY-667B4E3 Summary of contents
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DDR2 SDRAM FBDIMM MT9HTF6472F – 512MB MT9HTF12872F – 1GB Features • 240-pin, DDR2 fully buffered DIMM (FBDIMM) • Fast data transfer rates: PC2-4200, PC2-5300, or PC2-6400 • 512MB (64 Meg x 72), 1GB (128 Meg x 72) • 3.2 Gb/s, ...
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... Table 3: Part Numbers and Timing Parameters – 512MB 1 Base device: MT47H64M8, 512Mb DDR2 SDRAM Module 2 Part Number Density MT9HTF6472FY-80E__ 512MB MT9HTF6472FY-667__ 512MB MT9HTF6472FY-53E__ 512MB Table 4: Part Numbers and Timing Parameters – 1GB 1 Base device: MT47H128M8, 1Gb DDR2 SDRAM Module 2 Part Number Density MT9HTF12872FY-80E__ 1GB ...
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Pin Assignments and Descriptions Table 5: Pin Assignments 240-Pin FBDIMM Front Pin Symbol Pin Symbol Pin Symbol Pin Symbol PN3 PN3 ...
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Table 6: Pin Descriptions Symbol Type Description PS[9:0] Input Primary southbound data, positive lines. PS#[9:0] Input Primary southbound data, negative lines. SCK Input System clock input, positive line. SCK# Input System clock input, negative line. SCL Input Serial presence-detect (SPD) ...
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... System Block Diagram Commodity DDR2 DDR2 SDRAM component devices DDR2 component DDR2 component DDR2 component modules AMB • • • DDR2 component DDR2 component DDR2 component DDR2 component SMBus access to buffer registers Micron Technology, Inc. reserves the right to change products or specifications without notice. ...
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Functional Block Diagram Figure 3: Functional Block Diagram CS0# DQS0 DQS0# DM0 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQS1 DQS1# DM5 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQS2 DQS2# DM2 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 ...
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FBDIMM Design Specification – pending JEDEC approval • FBDIMM: Architecture and Protocol – JESD206 • FBDIMM: Advanced Memory Buffer (AMB) – JESD82-20 • Design for Test, Design for Validation (DFx) Specification • Serial Presence-Detect (SPD) for Fully Buffered DIMM ...
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See applicable DDR2 SDRAM component data sheet for Table 8: Input DC Voltage and Operating Conditions Parameter AMB supply voltage DDR2 SDRAM supply voltage Termination voltage EEPROM supply voltage SPD input high (logic 1) voltage SPD input low (logic ...
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Table 10: I Conditions (Continued) DD Symbol Condition I Active power, data pass through: L0 state; 50% DRAM bandwidth to downstream DD_ACTIVE_2 DIMM; 67% READ; 33% WRITE; Primary and secondary channels enabled; DDR2 SDRAM clock active; CKE HIGH; Command and ...
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Table 15: I Specifications – 1GB DDR2-667 DD Symbol I DD_IDLE_0 I 2600 CC I 1060 DD Total power 6.1 Table 16: I Specifications – 1GB DDR2-800 DD Symbol I DD_IDLE_0 I TBD CC I TBD DD Total power TBD ...
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Table 18: Serial Presence-Detect EEPROM AC Operating Conditions (Continued) Parameter/Condition SDA and SCL rise time SCL clock frequency Data-in setup time Start condition setup time Stop condition setup time WRITE cycle time 1. To avoid spurious start and stop conditions, ...
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Module Dimensions Figure 4: 240-Pin DDR2 FBDIMM 66.68 (2.63) TYP 0.5 (0.02) R (4X) 1.5 (0.059 (4X) 2.6 (0.102) D (2X) 5.2 (0.205) TYP 1.25 (0.0492) Pin 1 TYP 1.0 (0.039) TYP 9.9 (0.39) TYP 5.48 (0.216) (x4) ...