MT8VDDT1664AG-335DB Micron Technology Inc, MT8VDDT1664AG-335DB Datasheet - Page 22
![no-image](/images/manufacturer_photos/0/4/441/micron_technology_inc_sml.jpg)
MT8VDDT1664AG-335DB
Manufacturer Part Number
MT8VDDT1664AG-335DB
Description
MODULE SDRAM DDR 128MB 184DIMM
Manufacturer
Micron Technology Inc
Datasheet
1.MT8VDDT3264AG-335G6.pdf
(30 pages)
Specifications of MT8VDDT1664AG-335DB
Memory Type
DDR SDRAM
Memory Size
128MB
Speed
333MT/s
Package / Case
184-DIMM
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
pdf: 09005aef80867ab3, source: 09005aef80867a99
DD8C16_32_64x64AG.fm - Rev. G 9/04 EN
43. Random addressing changing and 100 percent of
44. CKE must be active (high) during the entire time a
45. I
data changing at every transfer.
refresh command is executed. That is, from the
time the AUTO REFRESH command is registered,
CKE must be active at each rising clock edge, until
t
driven to a valid high or low logic level. I
similar to I
address and control inputs to remain stable.
Although I
I
RFC has been satisfied.
DD
DD
2N specifies the DQ, DQS, and DM to be
2F is “worst case.”
DD
DD
2F, I
2
F
DD
except I
2N, and I
DD
DD
2Q specifies the
2Q are similar,
DD
2Q is
22
46. Whenever the operating frequency is altered, not
47. Leakage number reflects the worst case leakage
48. When an input signal is HIGH or LOW, it is
49. The -335 speed grade will operate with
128MB, 256MB, 512MB (x64, SR)
including jitter, the DLL is required to be reset, fol-
lowed by 200 clock cycles before any READ com-
mand.
possible through the module pin, not what each
memory device contributes.
defined as a steady state logic HIGH or LOW.
= 40ns and
frequency.
Micron Technology, Inc., reserves the right to change products or specifications without notice.
184-PIN DDR SDRAM UDIMM
t
RAS (MAX) = 120,000ns at any slower
©2004 Micron Technology. Inc.
t
RAS (MIN)