MT4VDDT864HG-26AB2 Micron Technology Inc, MT4VDDT864HG-26AB2 Datasheet - Page 11
![MODULE SDRAM DDR 64MB 200SODIMM](/photos/7/83/78349/mfg_mt_sodimm_series_sml.jpg)
MT4VDDT864HG-26AB2
Manufacturer Part Number
MT4VDDT864HG-26AB2
Description
MODULE SDRAM DDR 64MB 200SODIMM
Manufacturer
Micron Technology Inc
Specifications of MT4VDDT864HG-26AB2
Memory Type
DDR SDRAM
Memory Size
64MB
Speed
266MT/s
Package / Case
200-SODIMM
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Table 11:
PDF: 09005aef837131bb/Source: 09005aef8086ea0b
dd4c16_32x64h.fm - Rev. E 10/08 EN
Parameter/Condition
Operating one bank active-precharge current:
t
once per clock cycle; Address and control inputs changing once
every two clock cycles
Operating one bank active-read-precharge current:
BL = 4;
control inputs changing once per clock cycle
Precharge power-down standby current: All device banks idle;
Power-down mode;
Idle standby current: CS# = HIGH; All device banks idle;
t
changing once per clock cycle; Vin = Vref for DQ, DM, and DQS
Active power-down standby current: One device bank active;
Power-down mode;
Active standby current: CS# = HIGH; CKE = HIGH; One device
bank;
changing twice per clock cycle; Address and other control inputs
changing once per clock cycle
Operating burst read current: BL = 2; Continuous burst reads;
One device bank active; Address and control inputs changing once
per clock cycle;
Operating burst write current: BL = 2; Continuous burst writes;
One device bank active; Address and control inputs changing once
per clock cycle;
twice per clock cycle
Auto refresh current
Self refresh current: CKE ≤ 0.2V
Operating bank interleave read current: Four device bank
interleaving (BL = 4) with auto precharge;
(MIN); Address and control inputs change only during active READ
or WRITE commands
RC =
CK =
t
t
t
RC (MIN);
CK (MIN); CKE = HIGH; Address and other control inputs
RC =
t
RC =
t
RAS (MAX);
t
RC (MIN);
Idd Specifications and Conditions – 256MB
Values are for the MT46V32M16 DDR SDRAM only and are computed from values specified in the
512Mb (32 Meg x 16) component data sheet
t
t
t
CK =
CK =
CK =
t
t
CK =
CK =
t
t
t
CK (MIN); Iout = 0mA
CK (MIN); DQ, DM, and DQS inputs changing
CK (MIN); DQ, DM, and DQS inputs changing
t
CK =
t
CK =
t
t
CK (MIN); CKE = (LOW)
CK (MIN); CKE = LOW
t
CK (MIN); Iout= 0mA; Address and
t
CK (MIN); DQ, DM, and DQS inputs
t
RC =
128MB, 256MB (x64, SR) 200-Pin DDR SDRAM SODIMM
t
t
t
RC (MIN);
RFC =
RFC = 7.8125µs
t
RFC (MIN)
t
CK =
11
t
CK
Symbol
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Idd4W
Idd3N
Idd4R
Idd5A
Idd2P
Idd2F
Idd3P
Idd0
Idd1
Idd5
Idd6
Idd7
1380
1920
-40B
620
780
220
180
240
840
860
20
44
24
-335
1160
1620
520
640
180
140
200
660
780
20
40
20
©2003 Micron Technology, Inc. All rights reserved.
Idd Specifications
1120
1400
-265
460
580
160
120
180
580
540
20
40
20
Units
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA