MT16VDDT12864AG-40BF3 Micron Technology Inc, MT16VDDT12864AG-40BF3 Datasheet - Page 14
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MT16VDDT12864AG-40BF3
Manufacturer Part Number
MT16VDDT12864AG-40BF3
Description
MODULE DDR SDRAM 1GB 184-DIMM
Manufacturer
Micron Technology Inc
Specifications of MT16VDDT12864AG-40BF3
Memory Type
DDR SDRAM
Memory Size
1GB
Speed
400MT/s
Package / Case
184-DIMM
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Table 12: I
DDR SDRAM components only
Notes: 1–5, 8, 10, 14, 48; notes appear on pages 20–23; 0°C
pdf: 09005aef80739fa5, source: 09005aef807397e5
DD16C32_64_128_256x64AG.fm - Rev. C 9/04 EN
PARAMETER/CONDITION
OPERATING CURRENT: One device bank; Active-Precharge;
(MIN);
cyle; Address and control inputs changing once every two clock cycles
OPERATING CURRENT: One device bank; Active -Read Precharge;
Burst = 2;
control inputs changing once per clock cycle
PRECHARGE POWER-DOWN STANDBY CURRENT: All device banks
idle; Power-down mode;
IDLE STANDBY CURRENT: CS# = HIGH; All device banks idle;
MIN; CKE = HIGH; Address and other control inputs changing once
per clock cycle. V
ACTIVE POWER-DOWN STANDBY CURRENT: One device bank active;
Power-down mode;
ACTIVE STANDBY CURRENT: CS# = HIGH; CKE = HIGH; One device
bank; Active-Precharge;
andDQS inputs changing twice per clock cycle; Address and other
control inputs changing once per clock cycle
OPERATING CURRENT: Burst = 2; Reads; Continuous burst; One bank
active; Address and control inputs chan-ging once per clock cycle;
=
OPERATING CURRENT: Burst = 2; Writes; Continuous burst; One
device bank active; Address and control inputs changing once per
clock cycle;
per clock cycle
AUTO REFRESH CURRENT
SELF REFRESH CURRENT: CKE
OPERATING CURRENT: Four device bank interleaving READs (BL = 4)
with auto precharge,
control inputs change only during Active READ, or WRITE commands
NOTE:
t
CK (MIN); I
a: Value calculated as one module rank in this operating condition, and all other module ranks in I
b: Value calculated reflects all module ranks in this operating condition.
t
CK =
t
RC =
t
t
CK =
CK (MIN); DQ, DM and DQS inputs changing once per clock
OUT
t
DD
RC (MIN);
IN
= 0mA
t
CK (MIN); DQ, DM, and DQS inputs changing twice
= V
t
Specifications and Conditions – 256MB
CK =
t
REF
RC =
t
RC =
t
CK =
for DQ, DQS, and DM
t
t
CK (MIN); CKE = LOW
CK =
t
RC (MIN);
t
RAS (MAX);
t
0.2V
CK (MIN); CKE = (LOW)
t
CK (MIN); I
t
CK =
t
CK =
OUT
t
CK (MIN); Address and
t
t
REFC =
REFC = 15.625µs
= 0mA; Address and
t
CK (MIN); DQ, DM
t
RFC (MIN)
t
RC =
t
14
256MB, 512MB, 1GB, 2GB (x64, DR)
CK =
T
t
A
RC
+70°C; V
t
t
CK
CK
Micron Technology, Inc., reserves the right to change products or specifications without notice.
184-PIN DDR SDRAM UDIMM
I
I
I
I
I
I
I
SYM
DD4W
I
I
DD2N
DD3N
I
DD5A
I
I
DD2F
DD3P
DD4R
DD5
DD6
DD0
DD1
DD7
DD
b
b
a
a
a
b
b
a
b
b
b
= V
a
DD
1,024
1,104
1,144
1,144
4,240
2,864
-335
720
400
800
Q = +2.5V ±0.2V
48
80
48
MAX
1,064
1,024
3,520
2,664
-262
904
984
720
400
800
48
80
48
-26A/
1,024
1,024
3,520
2,624
DD
-265
864
984
640
320
720
48
80
32
2p (CKE LOW) mode.
©2004 Micron Technology, Inc.
UNITS NOTES
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
21, 28,
21, 28,
20, 24,
20, 42
20, 42
20, 42
20, 43
44
45
44
40
20
44
9