MT5VDDT3272HY-335F2 Micron Technology Inc, MT5VDDT3272HY-335F2 Datasheet - Page 14

• Manufacturer Part Number: MT5VDDT3272HY-335F2
• Description: MODULE DDR 256MB 200-SODIMM
• Manufacturer: Micron Technology Inc

Specifications of MT5VDDT3272HY-335F2

• Memory Type: DDR SDRAM
• Memory Size: 256MB
• Speed: 333MT/s
• Package / Case: 200-SODIMM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 14:
PDF: 09005aef80a8e793/Source: 09005aef80a8e767
dd5c16_32x72h.fm - Rev. F 2/07 EN
36–40
Byte
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
41
42
43
44
45
46
47
0
1
2
3
4
5
6
7
8
9
Number of SPD bytes used by Micron
Total number of bytes in SPD device
Fundamental memory type
Number of row addresses on assembly
Number of column addresses on assembly
Number of physical ranks on DIMM
Module data width
Module data width (continued)
Module voltage interface levels
SDRAM cycle time,
SDRAM access from clock,
Module configuration type
Refresh rate/type
SDRAM device width (primary DDR SDRAM)
Error-checking DDR SDRAM data width
MIN clock delay, back-to-back random column access
Burst lengths supported
Number of banks on DDR SDRAM device
CAS latencies supported
CS latency
WE latency
SDRAM module attributes
SDRAM device attributes: general
SDRAM cycle time,
SDRAM access from clock,
SDRAM cycle time,
SDRAM access from CK,
MIN row precharge time,
MIN row active-to-row active,
MIN RAS#-to-CAS# delay,
MIN RAS# pulse width,
Module rank density
Address and command setup time,
Address and command hold time,
Data/data mask input setup time,
Data/data mask input hold time,
Reserved
MIN active-to-active/refresh time,
MIN AUTO REFRESH-to-ACTIVE/AUTO REFRESH
command period,
SDRAM device MAX cycle time,
SDRAM device MAX DQS–DQ skew time,
SDRAM device MAX read data hold skew factor,
Reserved
DIMM height
Serial Presence-Detect Matrix (-40B Speed Grade)
t
RFC
t
t
t
CK, CL = 3
CK, CL = 2.5
CK, CL = 2
Description
t
t
RAS
AC, CL = 2
t
t
RCD
t
t
RP
AC, CL = 3
AC, CL = 2.5
t
RRD
t
CK (MAX)
t
DH
t
t
t
DS
RC
IH
t
IS
128MB, 256MB: (x72, ECC, SR) 200-Pin DDR SODIMM
t
DQSQ
t
QHS
14
0.75ns (-265 compatibility)
0.7ns (-335 compatibility)
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Unbuffered/diff. clock
Fast/concurrent AP
Entry (Version)
DDR SDRAM
SSTL 2.5V
7.8µs/SELF
3, 2.5, 2
256MB
1 clock
2, 4, 8
0.7ns
7.5ns
0.6ns
0.6ns
0.4ns
0.4ns
0.4ns
0.5ns
15ns
10ns
15ns
40ns
55ns
70ns
12ns
128
256
ECC
5ns
6ns
13
10
72
16
16
1
0
4
0
1
0
0
Serial Presence-Detect
©2004 Micron Technology, Inc. All rights reserved.
256MB
0D
0A
80
08
07
01
48
00
04
50
70
02
82
10
10
01
0E
04
1C
01
02
20
C1
60
70
75
75
3C
28
3C
28
40
60
60
40
40
00
37
46
30
28
50
00
01