MT5VDDT3272HG-40BF2 Micron Technology Inc, MT5VDDT3272HG-40BF2 Datasheet
MT5VDDT3272HG-40BF2
Specifications of MT5VDDT3272HG-40BF2
Related parts for MT5VDDT3272HG-40BF2
MT5VDDT3272HG-40BF2 Summary of contents
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... MHz), 266 MT/ – 7.5ns (133 MHz), 266 MT/ 2.5 • PCB height – 31.75mm (1.25in) Notes: 1. Contact Micron for industrial temperature module offerings. 2. Consult factory for product availability. 3. -40B only available for 256MB modules. Data Rate (MT/ 2 400 333 266 – ...
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Table 2: Addressing Refresh count Row addressing Device bank addressing Device configuration Column addressing Module rank addressing Table 3: Part Numbers and Timing Parameters Base device: MT46V16M16 Module 2 Part Number Density MT5VDDT1672H(I)G-335__ MT5VDDT1672H(I)Y-335__ MT5VDDT1672H(I)G-262__ MT5VDDT1672H(I)Y-262__ MT5VDDT1672H(I)G-26A__ MT5VDDT1672H(I)Y-26A__ MT5VDDT1672H(I)G-265__ MT5VDDT1672H(I)Y-265__ ...
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Pin Assignments and Descriptions Table 5: Pin Assignments 200-Pin SODIMM Front Pin Symbol Pin Symbol Pin Symbol Pin Symbol Pin Symbol Pin Symbol Pin Symbol Pin Symbol 101 REF DQ19 103 SS ...
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Table 6: Pin Descriptions Symbol Type WE#, CAS#, Input RAS# CK0, CK0#, CK1, Input CK1#, CK2, CK2# CKE0 Input S0# Input BA0, BA1 Input A0–A12 Input DM0–DM8 Input SDA Input/ Output SCL Input SA0–SA2 Input DQS0–DQS8 Input/ Output CB0–CB7 Input/ ...
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Functional Block Diagram Figure 2: Functional Block Diagram S0# CS# DQS0 UDQS DM0 UDM DQ0 DQ DQ1 DQ DQ2 DQ DQ3 DQ DQ4 DQ DQ5 DQ DQ6 DQ U1 DQ7 DQ DQS1 LDQS DM1 LDM DQ8 DQ DQ9 DQ DQ10 ...
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... The double data rate architecture is essentially a 2n-prefetch architecture with an interface designed to transfer two data words per clock cycle at the I/O pins. A single read or write access for DDR SDRAM modules effectively consists of a single 2n-bit wide, one-clock-cycle data transfer at the internal DRAM core and two corresponding n-bit wide, one-half-clock-cycle data transfers at the I/O pins ...
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... Micron encourages designers to simulate the performance of the module to achieve optimum values. Simulations are significantly more accurate and realistic than a gross estimation of module capacitance when inductance and delay parameters associated with trace lengths are used in simulations. JEDEC modules are currently designed using simulations to close timing budgets. PDF: 09005aef80a8e793/Source: 09005aef80a8e767 dd5c16_32x72h ...
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Component AC Timing and Operating Conditions Recommended AC operating conditions are given in the DDR component data sheets. Component specifications are available on Micron’s Web site. Module speed grades correlate with component speed grades, as shown in Table 8. Table ...
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I Specifications DD Table 9: DDR I Specifications and Conditions – 128MB DD Values shown for MT46V16M16 DDR SDRAM only and are computed from values specified in the 256Mb (16 Meg x 16) component data sheet Parameter/Condition Operating one bank ...
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Table 10: DDR I Specifications and Conditions – 256MB DD Values shown for MT46V32M16 DDR SDRAM only and are computed from values specified in the 512Mb (32 Meg x 16) component data sheet Parameter/Condition Operating one bank active-precharge current: t ...
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Serial Presence-Detect Table 11: Serial Presence-Detect EEPROM DC Operating Conditions All voltages referenced to V Parameter/Condition Supply voltage Input high voltage: Logic 1; All inputs Input low voltage: Logic 0; All inputs Output low voltage 3mA OUT Input ...
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Table 13: Serial Presence-Detect Matrix (-335, -26A, and -265 Speed Grades) Byte Description 0 Number of SPD bytes used by Micron 1 Total number of bytes in SPD device 2 Fundamental memory type 3 Number of row addresses on assembly ...
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... CK set to 7ns (0 x 70) for optimum BIOS compatibility. Actual device t RAS used for -262/-26A/-265 modules is calculated from RP, RCD, and RAP for -335 modules indicated as 18ns to align with industry Micron Technology, Inc., reserves the right to change products or specifications without notice. 13 Serial Presence-Detect 128MB 256MB 80 80 ...
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Table 14: Serial Presence-Detect Matrix (-40B Speed Grade) Byte Description 0 Number of SPD bytes used by Micron 1 Total number of bytes in SPD device 2 Fundamental memory type 3 Number of row addresses on assembly 4 Number of ...
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Table 14: Serial Presence-Detect Matrix (-40B Speed Grade) (continued) Byte Description 48–61 Reserved 62 SPD revision 63 Checksum for bytes 0–62 64 Manufacturer’s JEDEC ID code 65–71 Manufacturer’s JEDEC ID code 72 Manufacturing location 73–90 Module part number (ASCII) 91 ...
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Module Dimensions Figure 3: 200-Pin SODIMM Dimensions 2.00 (0.079) R (2X) U1 1.80 (0.071) (2X) 6.00 (0.236) 2.44 (0.096) 2.00 (0.079) PIN 200 Notes: 1. All dimensions are in millimeters (inches); MAX/MIN or typical (TYP) where noted. 2. The dimensional ...