MT16VDDT12864AY-335F2 Micron Technology Inc, MT16VDDT12864AY-335F2 Datasheet - Page 16

• Manufacturer Part Number: MT16VDDT12864AY-335F2
• Description: MODULE DDR 1GB 184-DIMM
• Manufacturer: Micron Technology Inc

Specifications of MT16VDDT12864AY-335F2

• Memory Type: DDR SDRAM
• Memory Size: 1GB
• Speed: 333MT/s
• Package / Case: 184-DIMM
• Main Category: DRAM Module
• Sub-category: DDR SDRAM
• Module Type: 184UDIMM
• Device Core Size: 64b
• Organization: 128Mx64
• Total Density: 1GByte
• Chip Density: 512Mb
• Maximum Clock Rate: 333MHz
• Operating Supply Voltage (typ): 2.5V
• Operating Current: 1.44A
• Number Of Elements: 16
• Operating Supply Voltage (max): 2.7V
• Operating Supply Voltage (min): 2.3V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Pin Count: 184
• Mounting: Socket
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 14: I
DDR SDRAM Components only
Notes: 1–5, 8, 10, 14, 48; notes appear on pages 20–23; 0°C
pdf: 09005aef80739fa5, source: 09005aef807397e5
DD16C32_64_128_256x64AG.fm - Rev. C 9/04 EN
PARAMETER/CONDITION
OPERATING CURRENT: One device bank; Active-Precharge;
t
per clock cyle; Address and control inputs changing once every two
clock cycles
OPERATING CURRENT: One device bank; Active -Read Precharge;
Burst = 4;
control inputs changing once per clock cycle
PRECHARGE POWER-DOWN STANDBY CURRENT: All device banks
idle; Power-down mode;
IDLE STANDBY CURRENT: CS# = HIGH; All device banks idle;
t
once per clock cycle. V
ACTIVE POWER-DOWN STANDBY CURRENT: One device bank
active; Power-down mode;
ACTIVE STANDBY CURRENT: CS# = HIGH; CKE = HIGH; One device
bank; Active-Precharge;
andDQS inputs changing twice per clock cycle; Address and other
control inputs changing once per clock cycle
OPERATING CURRENT: Burst = 2; Reads; Continuous burst; One
bank active; Address and control inputs changing once per clock
cycle;
OPERATING CURRENT: Burst = 2; Writes; Continuous burst; One
device bank active; Address and control inputs changing once per
clock cycle;
twice per clock cycle
AUTO REFRESH CURRENT
SELF REFRESH CURRENT: CKE
OPERATING CURRENT: Four device bank interleaving READs (BL = 4)
with auto precharge,
control inputs change only during Active READ, or WRITE
commands
NOTE:
RC (MIN);
CK MIN; CKE = HIGH; Address and other control inputs changing
a: Value calculated as one module rank in this operating condition, and all other module ranks in I
b: Value calculated reflects all module ranks in this operating condition.
t
CK =
t
RC =
t
CK =
t
t
CK =
CK (MIN); I
t
RC (MIN);
DD
t
CK (MIN); DQ, DM and DQS inputs changing once
t
CK (MIN); DQ, DM, and DQS inputs changing
Specifications and Conditions – 1GB
t
IN
RC =
OUT
t
= V
RC =
t
CK =
t
CK =
t
= 0mA
t
REF
CK =
RC (MIN);
t
RAS (MAX);
t
0.2V
for DQ, DQS, and DM
t
CK (MIN); CKE = (LOW)
CK (MIN); I
t
CK (MIN); CKE = LOW
t
CK =
t
OUT
CK =
t
CK (MIN); Address and
= 0mA; Address and
t
t
t
REFC =
REFC = 7.8125µs
CK (MIN); DQ, DM
t
RFC (MIN)
t
RC =
t
16
256MB, 512MB, 1GB, 2GB (x64, DR)
CK =
T
A
+70°C; V
I
I
I
I
I
I
I
SYM
DD4W
I
I
DD3N
I
DD5A
I
I
Micron Technology, Inc., reserves the right to change products or specifications without notice.
DD2P
DD2F
DD3P
DD4R
DD5
DD6
DD0
DD1
DD7
184-PIN DDR SDRAM UDIMM
DD
b
b
a
a
a
b
b
b
a
b
b
a
= V
1,080
1,320
1,360
1,440
4,640
3,280
-335
DD
720
560
800
160
80
80
Q = +2.5V ±0.2VV
MAX
1,080
1,320
1,360
1,280
4,640
3,240
-262
720
560
800
160
80
80
-26A/
1,200
1,200
1,120
4,480
2,840
-265
DD
960
640
480
720
160
80
80
2p (CKE LOW) mode.
©2004 Micron Technology, Inc.
UNITS NOTES
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
21, 28,
21, 28,
20, 42
20, 42
20, 42
20, 44
20, 44
20, 43
44
45
44
40
20
9