MT9VDDF3272Y-335K1 Micron Technology Inc, MT9VDDF3272Y-335K1 Datasheet

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MT9VDDF3272Y-335K1

Manufacturer Part Number
MT9VDDF3272Y-335K1
Description
MODULE DDR 256MB 240-DIMM
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT9VDDF3272Y-335K1

Memory Type
DDR SDRAM
Memory Size
256MB
Speed
333MT/s
Package / Case
240-DIMM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
• 184-pin, registered dual in-line memory module
• Fast data transfer rates: PC2100, PC2700, or PC3200
• 256MB (32 Meg x 72) and 512MB (64 Meg x 72)
• Supports ECC error detection and correction
• V
• V
• 2.5V I/O (SSTL_2-compatible)
• Internal, pipelined double data rate (DDR)
• Bidirectional data strobe (DQS) transmitted/received
• Differential clock inputs (CK and CK#)
• Multiple internal device banks for concurrent
• Single rank
• Selectable burst lengths (BL): 2, 4, or 8
• Auto precharge option
• Auto refresh and self refresh modes: 7.8125µs
• Serial presence-detect (SPD) with EEPROM
• Selectable CAS latency (CL) for maximum
• Gold edge contacts
184-Pin RDIMM (MO-206) Figures
Figure 1:
DDR SDRAM RDIMM
MT9VDDF3272 – 256MB
MT9VDDF6472 – 512MB
For component data sheets, refer to Micron’s Web site:
PDF: 09005aef8082c948/Source: 09005aef807d56a1
ddf9c32_64x72.fm - Rev. C 10/08 EN
PCB height: 28.58mm (1.125in)
(RDIMM)
(-40B: V
2n-prefetch architecture
with data—that is, source-synchronous data capture
operation
maximum average periodic refresh interval
compatibility
DD
DDSPD
= V
DD
DD
= +2.3V to +3.6V
Q = +2.5V
= V
R/C G (-40B, -335, -265)
Products and specifications discussed herein are subject to change by Micron without notice.
DD
Q = +2.6V)
256MB, 512MB (x72, ECC, SR) 184-Pin DDR SDRAM RDIMM
www.micron.com
1
Figure 2:
Notes: 1. Contact Micron for industrial temperature
Options
• Operating temperature
• Package
• Memory clock, speed, CAS latency
PCB height: 28.58mm (1.125in)
– Commercial (0°C ≤ T
– Industrial (–40°C ≤ T
– 200-pin DIMM (standard)
– 200-pin DIMM (Pb-free)
– 5ns (200 MHz), 400 MT/s, CL = 3
– 6ns (166 MHz), 333 MT/s, CL = 2.5
– 7.5ns (133 MHz), 266 MT/s, CL = 2
– 7.5ns (133 MHz), 266 MT/s, CL = 2
– 7.5ns (133 MHz), 266 MT/s, CL = 2.5
2. CL = CAS (READ) latency; registered mode will
Micron Technology, Inc., reserves the right to change products or specifications without notice.
module offerings.
add one clock cycle to CL.
R/C A (-335, -262, -26A -265)
A
A
1
≤ +85°C)
≤ +70°C)
©2002 Micron Technology, Inc. All rights reserved.
2
Marking
Features
None
-40B
-26A
-335
-262
-265
G
Y
I

Related parts for MT9VDDF3272Y-335K1

MT9VDDF3272Y-335K1 Summary of contents

Page 1

DDR SDRAM RDIMM MT9VDDF3272 – 256MB MT9VDDF6472 – 512MB For component data sheets, refer to Micron’s Web site: Features • 184-pin, registered dual in-line memory module (RDIMM) • Fast data transfer rates: PC2100, PC2700, or PC3200 • 256MB (32 Meg ...

Page 2

... Data sheets for the base devices can be found on Micron’s Web site. 2. All part numbers end with a two-place code (not shown) that designates component and PCB revisions. Consult factory for current revision codes. Example: MT9VDDF3272Y-335G3. PDF: 09005aef8082c948/Source: 09005aef807d56a1 ddf9c32_64x72.fm - Rev. C 10/08 EN ...

Page 3

... Table 4: Part Numbers and Timing Parameters – 512MB Modules Base device: MT46V64M8, Module 2 Part Number Density 512MB MT9VDDF6472G-40B__ 512MB MT9VDDF6472Y-40B__ MT9VDDF6472G-335__ 512MB MT9VDDF6472Y-335__ 512MB MT9VDDF6472G-265__ 512MB 512MB MT9VDDF6472Y-265__ Notes: 1. Data sheets for the base devices can be found on Micron’s Web site. ...

Page 4

Table 6: Pin Descriptions Symbol A0–A12 BA0, BA1 CK0, CK0# CKE0 DM0–DM8 RAS#, CAS#, WE# RESET# S0# SA0–SA2 SCL CB0–CB7 DQ0–DQ63 DQS0–DQS8 SDA DDSPD V REF PDF: 09005aef8082c948/Source: 09005aef807d56a1 ddf9c32_64x72.fm - ...

Page 5

Functional Block Diagrams Figure 3: Functional Block Diagram R/C G (-40B, -335, -265) RS0# DQS0 DM0 DQS1 DM1 DQS2 DM2 DQS3 DM3 DQS8 DM8 U6 S0# e BA0, BA1 g A0–A12 i RAS CAS# e CKE0 ...

Page 6

Figure 4: Functional Block Diagram R/C A (-335, -262, -26A, -265) RS0# DQS0 DM0 DQS1 DM1 DQS2 DM2 DQS3 DM3 DQS8 DM8 U11, U13 R e S0# g BA0, BA1 i A0–A12 s RAS# t CAS# e CKE0 r WE# ...

Page 7

... The double data rate architecture is essentially a 2n-prefetch architecture with an interface designed to transfer two data words per clock cycle at the I/O pins. A single read or write access for DDR SDRAM modules effectively consists of a single 2n-bit-wide, one- clock-cycle data transfer at the internal DRAM core and two corresponding n-bit-wide, one-half-clock-cycle data transfers at the I/O pins ...

Page 8

Electrical Specifications Stresses greater than those listed in Table 7 may cause permanent damage to the module. This is a stress rating only, and functional operation of the module at these or any other conditions outside those indicated on the ...

Page 9

... Design Considerations Simulations Micron memory modules are designed to optimize signal integrity through carefully designed terminations, controlled board impedances, routing topologies, trace length matching, and decoupling. However, good signal integrity starts at the system level. Micron encourages designers to simulate the signal characteristics of the system’s memory bus to ensure adequate signal integrity of the entire memory system ...

Page 10

I Specifications DD Table 9: I Specifications and Conditions – 256MB (Die Revision K) DD Values are for MT46V32M8 DDR SDRAM only and are computed from values specified in the 256Mb (32 Meg x 8) component data sheet Parameter/Condition Operating ...

Page 11

Table 10: I Specifications and Conditions – 256MB (All Other Die Revisions) DD Values are for MT46V32M8 DDR SDRAM only and are computed from values specified in the 256Mb (32 Meg x 8) component data sheet Parameter/Condition Operating one device ...

Page 12

Table 11: I Specifications and Conditions – 512MB DD Values are for MT46V64M8 DDR SDRAM only and are computed from values specified in the 512Mb (64 Meg x 8) component data sheet Parameter/Condition Operating one device bank active-precharge current: t ...

Page 13

Register and PLL Specifications Table 12: Register Specifications SSTV16859 devices or equivalent JESD82-4B Parameter Symbol high-level IH DC command, address input voltage low-level IL DC input voltage command, address AC high-level V ...

Page 14

Table 13: PLL Specifications CVF857 device or equivalent JESD82-1A Parameter DC high-level input voltage DC low-level input voltage Input voltage (limits) Input differential-pair cross voltage Input differential voltage Input differential voltage Input current Dynamic supply current Dynamic supply current Dynamic ...

Page 15

Serial Presence-Detect Table 15: Serial Presence-Detect EEPROM DC Operating Conditions Parameter/Condition Supply voltage Input high voltage: Logic 1; All inputs Input low voltage: Logic 0; All inputs Output low voltage 3mA OUT Input leakage current GND ...

Page 16

Module Dimensions Figure 5: 184-Pin DDR RDIMM (-40B, -335, -265) 2.0 (0.079) R (4X 2.5 (0.098) D (2X) 2.31 (0.091) TYP Pin 1 2.21 (0.087) TYP 1.27 (0.05) TYP 1.0 (0.039) TYP 64.77 (2.55) Pin 184 Notes: ...

Page 17

Figure 6: 184-Pin DDR RDIMM (-335, -262, -26A, -265) 2.0 (0.079) R (4X 2.5 (0.098) D (2X) 2.31 (0.091) TYP Pin 1 2.21 (0.087) 1.27 (0.05) TYP TYP 1.0 (0.039) 64.77 (2.55) TYP No components this side ...

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