MT18VDDF12872Y-40BF1 Micron Technology Inc, MT18VDDF12872Y-40BF1 Datasheet - Page 23
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MT18VDDF12872Y-40BF1
Manufacturer Part Number
MT18VDDF12872Y-40BF1
Description
MODULE DDR SDRAM 1GB 184-DIMM
Manufacturer
Micron Technology Inc
Specifications of MT18VDDF12872Y-40BF1
Memory Type
DDR SDRAM
Memory Size
1GB
Speed
400MT/s
Package / Case
184-DIMM
Main Category
DRAM Module
Sub-category
DDR SDRAM
Module Type
184RDIMM
Device Core Size
72b
Organization
128Mx72
Total Density
1GByte
Chip Density
512Mb
Access Time (max)
700ps
Maximum Clock Rate
400MHz
Operating Supply Voltage (typ)
2.6V
Operating Current
1.8A
Number Of Elements
18
Operating Supply Voltage (max)
2.7V
Operating Supply Voltage (min)
2.5V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Pin Count
184
Mounting
Socket
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
557-1233
MT18VDDF12872Y-40BF1
MT18VDDF12872Y-40BF1
Table 16: Register Timing Requirements and Switching Characteristics
Note: 1
NOTE:
pdf: 09005aef80f6b913, source: 09005aef80f6b41c
DDAF18C64_128x72G.fm - Rev. C 9/04 EN
1. The timing and switching specifications for the register listed above are critical for proper operation of DDR SDRAM
2. Data inputs must be low a minimum time of t
3. Data and clock inputs must be held at valid levels (not floating) a minimum time of t
4. For data signal input slew rate
5. For data signal input slew rate
6. CK, CK# signals input slew rate
or JESD82-4)
by JESD82-3
(bit pattern
REGISTER
Registered DIMMs. These are meant to be a subset of the parameters for the specific device used on the module.
Detailed information for this register is available in JEDEC Standard JESD82.
LOW.
SSTL
SYMBOL
f
t
clock
t
t
t
inact
t
t
t
PHL
act
pd
su
w
h
Differential Inputs Active Time
Setup Time, Slow Slew Rate
Differential Inputs Inactive
Setup Time, Fast Slew Rate
Hold Time, Slow Slew Rate
Hold Time, Fast Slew Rate
Clock to Output Time
Reset to Output Time
Clock Frequency
PARAMERTER
Pulse Duration
0.5 V/ns and
1 V/ns.
1V/ns.
Time
act
1V/ns.
max, after RESET# is taken HIGH.
Data After CK HIGH,
30pF to GND and
CK, CK# HIGH or
HIGH, CK# LOW
Data Before CK
23
CONDITION
50 to V
512MB, 1GB (x72, ECC, SR) PC3200
CK# LOW
LOW
TT
Micron Technology, Inc., reserves the right to change products or specifications without notice.
184-PIN DDR SDRAM RDIMM
V
0°C
DD
MIN
0.75
0.90
0.75
0.90
1.1
2.5
60
-
-
-
= +2.6V ±0.1V
T
A
inact
+70°C
max, after RESET# is taken
MAX
220
2.8
22
22
5
-
-
-
-
-
©2004 Micron Technology, Inc. All rights reserved.
UNITS
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
NOTES
4, 6
5, 6
4, 6
5, 6
2
3