SDCFJ-256-388-J SanDisk, SDCFJ-256-388-J Datasheet - Page 52
![COMPACT FLASH CARD 256MB](/photos/7/83/78343/mfg_sdcfj_series_sml.jpg)
SDCFJ-256-388-J
Manufacturer Part Number
SDCFJ-256-388-J
Description
COMPACT FLASH CARD 256MB
Manufacturer
SanDisk
Datasheet
1.SDCFH-1024-388.pdf
(108 pages)
Specifications of SDCFJ-256-388-J
Memory Size
256MB
Memory Type
CompactFLASH
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
585-1215
SDCFJ-256-388-J
SDCFJ-256-388-J
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02/07, Rev. 12.0
ATA Register Set and Protocol
4.5.11
Device Control Register (con’t)
Card (Drive) Address Register (Address–3F7[377]; Offset Fh)
This register is provided for compatibility with the AT disk drive interface. It is recommended
that this register not be mapped into the host's I/O space because of potential conflicts on Bit 7.
The bits are defined as follows:
Bit
D7
D6
D5
D4
D3
D2
D1
D0
D7
X
SW Rst
Name
ERR
-IEn
-WTG
X
X
X
X
1
D6
Don’t care.
Don’t care.
Don’t care.
Don’t care.
Bit ignored by the card.
Set to 1 in order to force the card to perform an AT Disk controller Soft
Reset operation. This does not change the PCMCIA Card Configuration
registers as a hardware reset does. The card remains in Reset until this bit
is reset to “0”.
Interrupt Enable bit enables interrupts when the bit is 0. When the bit is 1,
interrupts from the card are disabled. This bit also controls the Int bit in the
Configuration and Status Register. This bit is set to 0 at power on and
reset.
Bit ignored by the card.
-HS3
D5
4-8
-HS2
D4
SanDisk CompactFlash Card OEM Product Manual
-HS1
D3
Description
-HS0
D2
© 2007 SanDisk Corporation
-nDS1
D1
-nDS0
D0
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