MD1171-D128-P SanDisk, MD1171-D128-P Datasheet - Page 10

• Manufacturer Part Number: MD1171-D128-P
• Description: IDOC 128MB 44-IDE RIGHT
• Manufacturer: SanDisk
• Type: Flash Diskr

Specifications of MD1171-D128-P

• Memory Size: 128MB
• Memory Type: FLASH - Nand
• Density: 128MByte
• Operating Supply Voltage (typ): 3.3/5V
• Operating Temperature (min): 0C
• Operating Temperature (max): 70C
• Package Type: Not Required
• Mounting: Socket
• Pin Count: 44
• Operating Temperature Classification: Commercial
• Operating Supply Voltage (min): 3.135/4.5V
• Operating Supply Voltage (max): 3.465/5.5V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 585-1186

3.
3.1
Figure 1 shows iDiskOnChip operation from the system level, including the major hardware blocks.
iDiskOnChip integrates an IDE controller and flash devices. Communication with the host occurs
through the host interface, using the standard ATA protocol. Communication with the flash
device(s) occurs through the flash interface.
3.2
The controller is equipped with 16KB of internal memory that is used for storing code and data. The
internal memory can also be used as an intermediate memory for storing data blocks during a
wear-leveling procedure.
An 8KB internal boot ROM includes basic routines for accessing the flash memories and for
loading the main code into the internal memory
The host interface provides all required signals, is fully compliant with the PC Card standard, and
supports True-IDE mode operation requirements.
3.3
Highly sophisticated Error Correction Code algorithms are implemented. The ECC unit consists of
the Parity Unit (parity-byte generation) and the Syndrome Unit (syndrome-byte computation). This
unit implements a Reed-Solomon algorithm that can correct two bits per 512 bytes in an ECC block.
Code-byte generation during write operations, as well as error detection during read operation, is
implemented on the fly without any speed penalties.
9
Control & Address
T
Overview
Controller
Error Detection and Correction
Data Signals
HEORY OF
Signals
O
PERATION
Figure 1: iDiskOnChip Block Diagram
Bus Control
Decoder
Address
RAM
Data Sheet, Rev. 1.4
Controller
CPU
EDC/ECC
Control &
EPROM
Status
8-bit
8bit
Flash
Flash
iDiskOnChip (iDOC)
91-SR-012-01-8L