DS1961S-F3 Maxim Integrated Products, DS1961S-F3 Datasheet - Page 22

• Manufacturer Part Number: DS1961S-F3
• Description: IBUTTON EEPROM 1KBit SHA-1 2CAN
• Manufacturer: Maxim Integrated Products
• Series: iButton®r

Specifications of DS1961S-F3

• Rohs Information: IButton RoHS Compliance Plan
• Memory Size: 128B
• Memory Type: EEPROM
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

After the master has issued the command code and specified the target addresses (TA1 and TA2), the
DS1961S first clears the EN_LFS flag. If the target address is valid (< 0080h), the master receives the
page data beginning at the target address through the end of the data page, one byte FFh and the inverted
CRC of the command code, target address, transmitted page data and FFh byte. If the target address is
invalid (³ 0080h), the master receives FFh bytes rather than page data. Immediately after the CRC is
received, the master waits for t
During this time the SHA engine of the DS1961S computes the message authentication code over the
secret, all 32 data bytes of the selected page, the device’s registration number (without the CRC) and the
3-byte challenge. Now the master reads the 160-bit MAC, which is followed by an inverted CRC as a
means to safeguard the data transfer. If the master continues reading after the CRC it receives AAh.
Table 4. SHA-1 INPUT DATA FOR READ AUTHENTICATED PAGE COMMAND
Legend
M0[31:24] = (SS + 0)
M1[31:24] = (PP + 0)
M2[31:24] = (PP + 4)
M3[31:24] = (PP + 8)
M4[31:24] = (PP + 12) M4[23:16] = (PP + 13) M4[15:8] = (PP + 14)
M5[31:24] = (PP + 16) M5[23:16] = (PP + 17) M5[15:8] = (PP + 18)
M6[31:24] = (PP + 20) M6[23:16] = (PP + 21) M6[15:8] = (PP + 22)
M7[31:24] = (PP + 24) M7[23:16] = (PP + 25) M7[15:8] = (PP + 26)
M8[31:24] = (PP + 28) M8[23:16] = (PP + 29) M8[15:8] = (PP + 30)
M9[31:24] = FFh
M10[31:24] = MP
M11[31:24] = (ID + 3) M11[23:16] = (ID + 4) M11[15:8] = (ID + 5)
M12[31:24] = (SS + 4) M12[23:16] = (SS + 5) M12[15:8] = (SS + 6)
M13[31:24] = (SP + 4) M13[23:16] = (SP + 5) M13[15:8] = (SP + 6)
M14[31:24] = 00h
M15[31:24] = 00h
Mt
(SS + N)
(PP + N) Byte N of Memory Page; Memory Pages Begin at
(SP + N)
MP
(ID + N)
M10[23:16] = (ID + 0) M10[15:8] = (ID + 1)
M0[23:16] = (SS + 1)
M1[23:16] = (PP + 1)
M2[23:16] = (PP + 5)
M3[23:16] = (PP + 9)
M9[23:16] = FFh
M14[23:16] = 00h
M15[23:16] = 00h
Input Buffer of SHA Engine
0 £ t £ 15; 32-Bit Words
Byte N of Secret; Secret Begins at Address 0080h
(See Memory Map)
0000h, 0020h, 0040h and 0060h (see Memory Map)
Byte N of Scratchpad
MP[7:3] = 01000b,
MP[2:0] = T7:T5
Byte N of Identity Register
The Last Byte of the Identity Register is Not Used.
CSHA
during which the voltage on the 1-Wire bus must not fall below 2.8V.
22 of 36
M0[15:8] = (SS + 2)
M1[15:8] = (PP + 2)
M2[15:8] = (PP + 6)
M3[15:8] = (PP + 10)
M9[15:8] = FFh
M14[15:8] = 00h
M15[15:8] = 01h
M10[7:0] = (ID + 2)
M12[7:0] = (SS + 7)
M13[7:0] = 80h
M0[7:0] = (SS + 3)
M1[7:0] = (PP + 3)
M2[7:0] = (PP + 7)
M3[7:0] = (PP + 11)
M4[7:0] = (PP + 15)
M5[7:0] = (PP + 19)
M6[7:0] = (PP + 23)
M7[7:0] = (PP + 27)
M8[7:0] = (PP + 31)
M9[7:0] = FFh
M11[7:0] = (ID + 6)
M14[7:0] = 00h
M15[7:0] = B8h