THNCF512MDGI Toshiba, THNCF512MDGI Datasheet - Page 8

• Manufacturer Part Number: THNCF512MDGI
• Description: MEMORY CARD COMPACT FLASH 512MB
• Manufacturer: Toshiba

Specifications of THNCF512MDGI

• Memory Size: 512MB
• Memory Type: CompactFLASH
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

RESET
(PC Card Memory Mode)
RESET
(PC Card I/O Mode)
−
(True IDE Mode)
GND
(PC Card Memory Mode)
(PC Card I/O Mode)
(True IDE Mode)
VCC
(PC Card Memory Mode)
(PC Card I/O Mode)
(True IDE Mode)
−
(PC Card Memory Mode)
(PC Card I/O Mode)
(True IDE Mode)
−
(PC Card Memory Mode)
−
(PC Card I/O Mode)
IORDY
(True IDE Mode)
−
(PC Card Memory Mode)
−
(PC Card I/O Mode)
−
(True IDE Mode)
WP
(PC Card Memory Mode )
−
(PC Card I/O Mode)
−
(True IDE Mode)
RESET
VS1 /
WAIT
WAIT
WE
WE
WE
IOIS16
IOIS16
−
VS2
Signal Name
Dir


O
O
O
I
I
Pin No.
13,38
33,40
1,50
TENTATIVE
41
42
36
24
When the pin is high, the CompactFlasgh Storage Card is reset.
The CompactFlash Storage Card is reset when this pin is left high
or open at power up.
In the True IDE Mode this input pin is the active low hardware reset
signal from the host.
Ground
+5V +3.3V power
Voltage
CompactFlash Storage Card CIS can be read at 3.3 volts and
−
The −WAIT signal is driven low by the CompactFlash Storage Card
to indicate the host to delay completion of a memory or I/O cycle
that is in progress.
This CompactFlash Storage Card outputs always high.
This CompactFlash Storage Card outputs always high.
This is a signal driven by the host and used for strobing memory
write data to the registers of the CompactFlash Storage Card when
the card is configured I the memory interface mode. It is also used
for writing the configuration registers.
In PC Card I/O Mode, this signal is used only for writing the
Attribute memory.
In True IDE Mode this input signal is not used and should be
connected to VCC by the host.
The CompactFlash Storage Card does not have a write protect
switch. This signal is held low after the completion of the reset
initialization sequence.
This signal is asserted when 16 bit or odd byte access to task file
registers is accepted.
In True IDE Mode this output signal is asserted low when this
device is expecting a word data transfer cycle.
VS2 is reserved by PCMCIA for a secondary voltage.
Sense
Signals.
Description
-VS1
THNCFxxxxDGI Series
is
grounded
2004-5-18 8/47
so
that
the