DS1985-F3+ Maxim Integrated Products, DS1985-F3+ Datasheet - Page 14
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DS1985-F3+
Manufacturer Part Number
DS1985-F3+
Description
IBUTTON 16KBit ADD-ONLY F3
Manufacturer
Maxim Integrated Products
Series
iButton®r
Datasheet
1.DS1985-F5.pdf
(26 pages)
Specifications of DS1985-F3+
Rohs Information
IButton RoHS Compliance Plan
Memory Size
2KB
Memory Type
EPROM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
DS1985
For both of these cases, the decision to continue (to apply a Program Pulse to the DS1985) is made
entirely by the bus master, since the DS1985 will not be able to determine if the 16-bit CRC calculated by
the bus master agrees with the 16-bit CRC calculated by the DS1985. If an incorrect CRC is ignored and
a Program Pulse is applied by the bus master, incorrect programming could occur within the DS1985.
Also note that the DS1985 will always increment its internal address counter after the receipt of the eight
read time slots used to confirm the programming of the selected EPROM byte. The decision to continue is
again made entirely by the bus master, therefore if the EPROM data byte does not match the supplied
data byte but the master continues with the Write Memory command, incorrect programming could occur
within the DS1985. The Write Memory command sequence can be ended at any point by issuing a Reset
Pulse.
To save time when writing more than one consecutive byte of the DS1985’s data memory it is possible to
omit reading the 16-bit CRC, which allows verification of data and address before the data is copied to
the EPROM memory. This saves 16 time slots or 976 s for every byte to be programmed. This speed-
programming mode is accessed with the command code F3H instead of 0FH. It follows basically the
same flow chart as the Write Memory command, but skips sending the CRC immediately preceding the
Program Pulse. This command should only be used if the electrical contact between bus master and the
DS1985 is firm since a poor contact may result in corrupted data inside the EPROM memory.
WRITE STATUS [55H]
The Write Status command is used to program the EPROM Status data field. The bus master will follow
the command byte with a 2-byte starting address (TA1=(T7:T0), TA2=(T15:T8)) and a byte of status data
(D7:D0). A 16-bit CRC of the command byte, address bytes, and data byte is computed by the DS1985
and read back by the bus master to confirm that the correct command word, starting address, and data
byte were received.
If the CRC read by the bus master is incorrect, a Reset Pulse must be issued and the entire sequence must
be repeated. If the CRC received by the bus master is correct, a programming pulse (12 volts on the 1-
Wire bus for 480 s) is issued by the bus master. Prior to programming, the EPROM Status data field will
appear as logical 1s. For each bit in the data byte provided by the bus master that is set to a logical 0, the
corresponding bit in the selected byte of the EPROM Status data field will be programmed to a logical 0
after the programming pulse has been applied at that byte location.
After the 480s programming pulse is applied and the data line returns to the idle level, the bus master
issues eight read time slots to verify that the appropriate bits have been programmed. The DS1985
responds with the data from the selected EPROM Status address sent least significant bit first. This byte
contains the logical AND of all bytes written to this EPROM Status Byte address. If the EPROM Status
Byte contains 1s in bit positions where the byte issued by the master contained 0s, a Reset Pulse should
be issued and the current byte address should be programmed again. If the DS1985 EPROM Status byte
contains 0s in the same bit positions as the data byte, the programming was successful and the DS1985
will automatically increment its address counter to select the next byte in the EPROM Status data field.
The new two-byte address will also be loaded into the 16-bit CRC generator as a starting value. The bus
master will issue the next byte of data using eight write time slots.
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