HCPL-0721 Avago Technologies US Inc., HCPL-0721 Datasheet - Page 12

• Manufacturer Part Number: HCPL-0721
• Description: OPTOCOUPLER CMOS 25MBD 8-SOIC
• Manufacturer: Avago Technologies US Inc.

Specifications of HCPL-0721

• Voltage - Isolation: 3750Vrms
• Number Of Channels: 1, Unidirectional
• Current - Output / Channel: 10mA
• Data Rate: 25MBd
• Propagation Delay High - Low @ If: 20ns
• Input Type: Logic
• Output Type: Push-Pull, Totem-Pole
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (0.154", 3.90mm Width)
• No. Of Channels: 1
• Isolation Voltage: 3.75kV
• Optocoupler Output Type: Gate Drive
• Input Current: 10µA
• Output Voltage: 5V
• Opto Case Style: SOIC
• No. Of Pins: 8
• Propagation Delay Low-high: 40ns
• Common Mode Voltage Vcm: 1000V
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 516-1111-5

Pulse-width distortion (PWD) is the difference between
t
rate capability of a transmission system. PWD can be
expressed in percent by dividing the PWD (in ns) by the
minimum pulse width (in ns) being trans mitted. Typical-
ly, PWD on the order of 20 - 30% of the minimum pulse
width is tolerable.
Propagation delay skew, t
to con sider in parallel data applications where synchro-
nization of signals on parallel data lines is a concern. If
the parallel data is being sent through a group of opto-
couplers, differences in propagation delays will cause the
data to arrive at the outputs of the optocouplers at differ-
ent times. If this difference in propagation delay is large
enough it will determine the maximum rate at which
parallel data can be sent through the optocouplers.
Figure 13. Propagation delay skew waveform.
12
Propagation delay skew repre sents the uncertainty of
where an edge might be after being sent through an op-
tocoupler. Figure 14 shows that there will be uncertainty
in both the data and clock lines. It is important that these
two areas of uncertainty not overlap, otherwise the clock
signal might arrive before all of the data outputs have
settled, or some of the data outputs may start to change
before the clock signal has arrived. From these consider-
ations, the absolute minimum pulse width that can be sent
through optocouplers in a parallel application is twice t
PHL
V
V
and t
V
V
O
O
I
I
PLH
and often determines the maxi mum data
50%
50%
CMOS
2.5 V,
PSK
t
PSK
, is an important parameter
2.5 V,
CMOS
PSK
.
Propagation delay skew is defined as the difference be-
tween the minimum and maximum propa gation delays,
either t
which are operating under the same conditions (i.e., the
same drive current, supply volt age, output load, and op-
erating temperature). As illustrated in Figure 13, if the in-
puts of a group of optocouplers are switched either ON
or OFF at the same time, t
the shortest propagation delay, either t
the longest propagation delay, either t
As mentioned earlier, t
parallel data transmission rate. Figure 14 is the timing
diagram of a typical parallel data application with both
the clock and data lines being sent through the opto-
couplers. The figure shows data and clock signals at the
inputs and outputs of the optocouplers. In this case the
data is assumed to be clocked off of the rising edge of
the clock.
Figure 14. Parallel data transmission example.
A cautious design should use a slightly longer pulse
width to ensure that any additional uncertainty in the
rest of the circuit does not cause a problem.
The HCPL-772X/072X optocouplers offer the advantage
of guaranteed specifications for propagation delays,
pulse-width distortion, and propagation delay skew
over the recommended temperature and power supply
ranges.
INPUTS
OUTPUTS
CLOCK
CLOCK
DATA
DATA
PLH
or t
PHL
t
PSK
, for any given group of optocoup lers
PSK
t
PSK
can determine the maximum
PSK
is the difference between
PLH
PLH
or t
or t
PHL
.
PHL
, and