HCPL-0710 Avago Technologies US Inc., HCPL-0710 Datasheet - Page 11

OPTOCOUPLER CMOS 12MBD 8-SOIC

HCPL-0710

Manufacturer Part Number
HCPL-0710
Description
OPTOCOUPLER CMOS 12MBD 8-SOIC
Manufacturer
Avago Technologies US Inc.
Datasheet

Specifications of HCPL-0710

Voltage - Isolation
3750Vrms
Number Of Channels
1, Unidirectional
Current - Output / Channel
10mA
Data Rate
12.5MBd
Propagation Delay High - Low @ If
20ns
Input Type
Logic
Output Type
Push-Pull, Totem-Pole
Mounting Type
Surface Mount
Package / Case
8-SOIC (0.154", 3.90mm Width)
No. Of Channels
1
Isolation Voltage
3.75kV
Optocoupler Output Type
Gate Drive
Input Current
10µA
Output Voltage
5V
Opto Case Style
SOIC
No. Of Pins
8
Propagation Delay Low-high
40ns
Common Mode Voltage Vcm
1000V
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
516-1116-5

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0
11
Pulse-width distortion (PWD) is the difference between
t
rate capability of a transmission system. PWD can be
expressed in percent by dividing the PWD (in ns) by
the minimum pulse width (in ns) being transmitted.
Typically, PWD on the order of 20 - 30% of the minimum
pulse width is tolerable. The PWD specification for the
HCPL-x710 is 8 ns (10%) maximum across recommend-
ed operating conditions. 10% maximum is dictated
by the most stringent of the three fieldbus standards,
PROFIBUS.
Propagation delay skew, t
to consider in parallel data applications where synchro-
nization of signals on parallel data lines is a concern. If
the parallel data is being sent through a group of op-
tocouplers, differences in propagation delays will cause
the data to arrive at the outputs of the optocouplers at
different times. If this difference in propagation delay
is large enough it will determine the maximum rate at
which parallel data can be sent through the optocou-
plers.
Figure 15. Propagation delay skew waveform.
Propagation delay skew represents the uncertainty of
where an edge might be after being sent through an
optocoupler. Figure 16 shows that there will be uncer-
tainty in both the data and clock lines. It is important
that these two areas of uncertainty not overlap,
otherwise the clock signal might arrive before all of
the data outputs have settled, or some of the data
outputs may start to change before the clock signal
has arrived. From these considerations, the absolute
minimum pulse width that can be sent through op-
PHL
V
V
V
V
O
O
I
I
and t
PLH
and often determines the maximum data
50%
50%
HCPL-0710 fig 14
CMOS
2.5 V,
t
PSK
PSK
, is an important parameter
2.5 V,
CMOS
Propagation delay skew is defined as the differ-
ence between the minimum and maximum propa-
gation delays, either t
of optocouplers which are operating under the same
conditions (i.e., the same drive current, supply voltage,
output load, and operating temperature). As illustrated
in Figure 15, if the inputs of a group of optocouplers
are switched either ON or OFF at the same time, t
the difference between the shortest propagation delay,
either t
either t
As mentioned earlier, t
parallel data transmission rate. Figure 16 is the timing
diagram of a typical parallel data application with both
the clock and data lines being sent through the opto-
couplers. The figure shows data and clock signals at the
inputs and outputs of the optocouplers. In this case the
data is assumed to be clocked off of the rising edge of
the clock.
Figure 16. Parallel data transmission example.
tocouplers in a parallel application is twice t
A cautious design should use a slightly longer pulse
width to ensure that any additional uncertainty in the
rest of the circuit does not cause a problem.
The HCPL-x710 optocouplers offer the advantage of
guaranteed specifications for propagation delays, pulse-
width distortion, and propagation delay skew over the
recommended temperature and power supply ranges.
INPUTS
OUTPUTS
CLOCK
CLOCK
PLH
PLH
DATA
DATA
or t
or t
PHL
PHL
.
t
, and the longest propagation delay,
PSK
PLH
PSK
HCPL-0710 fig 15
t
PSK
can determine the maximum
or t
PHL
, for any given group
PSK
PSK
is
.

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