HCPL-060L Avago Technologies US Inc., HCPL-060L Datasheet - Page 17
![OPTOCOUPLER 15MBD 3.3V 8-SOIC](/photos/7/65/76546/516-8-soic_sml.jpg)
HCPL-060L
Manufacturer Part Number
HCPL-060L
Description
OPTOCOUPLER 15MBD 3.3V 8-SOIC
Manufacturer
Avago Technologies US Inc.
Datasheet
1.HCPL-060L-000E.pdf
(20 pages)
Specifications of HCPL-060L
Voltage - Isolation
3750Vrms
Number Of Channels
1, Unidirectional
Current - Output / Channel
50mA
Data Rate
15MBd
Propagation Delay High - Low @ If
50ns @ 7.5mA
Current - Dc Forward (if)
20mA
Input Type
DC
Output Type
Open Collector
Mounting Type
Surface Mount
Package / Case
8-SOIC (0.154", 3.90mm Width)
No. Of Channels
1
Isolation Voltage
3.75kV
Optocoupler Output Type
Logic Gate
Input Current
15mA
Output Voltage
7V
Opto Case Style
SOIC
No. Of Pins
8
Common Mode Voltage Vcm
1000V
Forward Voltage
1.5V
Number Of Elements
1
Baud Rate
15Mbps
Forward Current
20mA
Output Current
50mA
Package Type
SOIC
Operating Temp Range
-40C to 85C
Power Dissipation
85mW
Propagation Delay Time
90ns
Pin Count
8
Mounting
Surface Mount
Reverse Breakdown Voltage
5V
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant, Contains lead / RoHS non-compliant
Other names
516-1100-5
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HCPL-060L
Manufacturer:
AVAGO
Quantity:
3 000
Part Number:
HCPL-060L
Manufacturer:
AVAGO/安华高
Quantity:
20 000
Part Number:
HCPL-060L#060
Manufacturer:
AVAGO/安华高
Quantity:
20 000
Company:
Part Number:
HCPL-060L#500
Manufacturer:
AVAGO
Quantity:
3 000
Company:
Part Number:
HCPL-060L-000E
Manufacturer:
AVAGO
Quantity:
40 000
Part Number:
HCPL-060L-060
Manufacturer:
AVAGO/安华高
Quantity:
20 000
Company:
Part Number:
HCPL-060L-060E
Manufacturer:
AVAGO
Quantity:
40 000
Part Number:
HCPL-060L-500E
Manufacturer:
AVAGO/安华高
Quantity:
20 000
Figure 10. Test circuit for common mode transient immunity and typical waveforms.
Figure 11. Recommended printed circuit board layout.
17
PULSE GEN.
Figure 9. Test circuit for t
t
7.5 mA
f
Z
V
I
= t
I
O
F
F
CC
= 50 Ω
r
V
= 5 ns
FF
BUS (FRONT)
NC
NC
B
A
1
2
3
4
INPUT V
MONITORING NODE
EHL
E
1
2
3
4
and t
SINGLE CHANNEL
GND
V
GENERATOR
CC
(SEE NOTE 5)
10 mm MAX.
ELH
Z
+
O
PULSE
.
8
7
6
5
= 50 Ω
V
0.1μF
–
CM
GND
V
CC
0.1 μF
BYPASS
8
6
7
5
V
V
V
CM
O
O
*C
3.3V or 5V
GND BUS (BACK)
L
0.5 V
0 V
5 V
0.1 μF
BYPASS
R
L
SINGLE CHANNEL
DEVICE ILLUSTRATED.
SWITCH AT B: I
SWITCH AT A: I
OUTPUT V
MONITORING
NODE
R
L
O
3.3V or 5V
OUTPUT V
MONITORING
NODE
F
F
*C
= 7.5 mA
= 0 mA
ENABLE
OUTPUT
L
OUTPUT
IS APPROXIMATELY 15 pF WHICH INCLUDES
PROBE AND STRAY WIRING CAPACITANCE.
V
V
V
INPUT
CM
O
O
O
V
(MIN.)
(MAX.)
V
E
(PEAK)
O
I
F
V
t
FF
EHL
A
B
CM
CM
H
L
t
ELH
1
2
3
4
DUAL CHANNEL
GENERATOR
Z
+
PULSE
O
= 50 Ω
V
–
CM
1.5 V
3.0 V
1.5 V
GND
V
CC
8
7
6
5
0.1 μF
BYPASS
R
L
3.3V or 5V
OUTPUT V
MONITORING
NODE
O