VO0601T Vishay, VO0601T Datasheet - Page 4

• Manufacturer Part Number: VO0601T
• Description: OPTOCPLR 10MBD 1CH 5KV/US 8SOIC
• Manufacturer: Vishay

Specifications of VO0601T

• Isolation Voltage: 4000 Vrms
• Voltage - Isolation: 4000Vrms
• Number Of Channels: 1, Unidirectional
• Current - Output / Channel: 50mA
• Data Rate: 10MBd
• Propagation Delay High - Low @ If: 50ns @ 7.5mA
• Current - Dc Forward (if): 20mA
• Input Type: DC
• Output Type: Open Collector
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (0.154", 3.90mm Width)
• Maximum Continuous Output Current: 50 mA
• Maximum Fall Time: 0.007 us
• Maximum Forward Diode Current: 20 mA
• Maximum Rise Time: 23 ns
• Minimum Forward Diode Voltage: 1.1 V
• Output Device: Logic Gate Photo IC
• Configuration: 1 Channel
• Maximum Baud Rate: 10 MBd (Typ)
• Maximum Forward Diode Voltage: 1.7 V
• Maximum Reverse Diode Voltage: 5 V
• Maximum Input Diode Current: 15 mA
• Maximum Power Dissipation: 85 mW
• Maximum Operating Temperature: + 100 C
• Minimum Operating Temperature: - 40 C
• No. Of Channels: 1
• Optocoupler Output Type: Logic Gate
• Input Current: 15mA
• Output Voltage: 7V
• Opto Case Style: SOIC
• No. Of Pins: 8
• Propagation Delay Low-high: 49ns
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 751-1377-2; VO0601T

VO0600T, VO0601T, VO0611T, VO0630T, VO0631T, VO0661T
Vishay Semiconductors
www.vishay.com
4
Pulse gen.
Z = 50 Ω
t = t = 5 ns
f
o
Pulse gen.
Z = 50 Ω
t = t = 5 ns
r
7.5 mA
f
o
Inpu t I
monitoring
node
I
The probe and Jig capacitances are included in C
r
F
F
R
1
2
3
4
M
Single channel
The probe and Jig capacitances are included in C
Input V
monitoring node
I
F
Pulse gen.
Z = 50 Ω
t = t = 5 ns
f
o
1
2
3
4
Input
monitoring
node
18963-3
For technical questions, contact:
E
r
Single channel
V
GND
V
OUT
V
CC
Fig. 1 - Single Channel Test Circuit for t
E
Fig. 2 - Dual Channel Test Circuit for t
R
High Speed Optocoupler, 10 MBd,
V
GND
8
6
5
M
7
V
OUT
I
F
Fig. 3 - Single Channel Test Circuit for t
CC
V
E
V
8
6
5
7
CC
bypass
V
1
2
3
4
0.1 µF
CC
0.1 µF
bypass
SOIC-8 Package
R L
C = 15 pF
R
Output V
monitoring
node
C = 15 pF
L
L
L
Output V
monitoring
node
L
[e-mail]
L
O
O
8
7
6
5
Output V
Input I
0.1 µF
bypass
PLH
PLH
Output V
, t
, t
Inpu t V
F
PHL
EHL
O
PHL
V
, t
, t
, t
CC
R
t
r
ELH
C
PHL
r
E
and t
L
O
L
and t
= 15 PF
f
Output V
monitoring
node
t
f
EHL
O
t
18964-2
PLH
Document Number: 84607
1.5 V
18975-2
V
t
I
I
OL
0 mA
F
F
ELH
= 7.5 mA
= 3.75 mA
V
OH
Rev. 1.8, 09-Nov-10
3 V
1.5 V
1.5 V