KS8995MA Micrel Inc, KS8995MA Datasheet - Page 43
![IC SWITCH 10/100 5PORT 128PQFP](/photos/6/81/68152/576-128-pqfp_sml.jpg)
KS8995MA
Manufacturer Part Number
KS8995MA
Description
IC SWITCH 10/100 5PORT 128PQFP
Manufacturer
Micrel Inc
Specifications of KS8995MA
Applications
*
Mounting Type
Surface Mount
Package / Case
128-MQFP, 128-PQFP
Number Of Primary Switch Ports
5
Internal Memory Buffer Size
64
Operating Supply Voltage (typ)
1.8/2.5/3.3V
Fiber Support
Yes
Integrated Led Drivers
Yes
Phy/transceiver Interface
MII/SNI
Power Supply Type
Analog/Digital
Package Type
PQFP
Data Rate (typ)
10/100Mbps
Vlan Support
Yes
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Pin Count
128
Mounting
Surface Mount
Jtag Support
No
Operating Temperature Classification
Commercial
Data Rate
100Mbps
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
576-1017 - BOARD EVAL EXPERIMENT KS8995M
Lead Free Status / RoHS Status
Not Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
KS8995MAI
Manufacturer:
MAXIM
Quantity:
4 430
Note:
1. 148,800 frames/sec × 50ms/interval × 1% = 74 frames/interval (approximately) = 0x4A.
May 2005
KS8995MA
Address
5
4
3
2-0
Register 7 (0x07): Global Control 5
7-0
Register 8 (0x08): Global Control 6
7-0
Register 9 (0x09): Global Control 7
7-0
Register 10 (0x0A): Global Control 8
7-0
Register 11 (0x0B): Global Control 9
7-4
3
2
1
0
Name
Switch MII Flow
Control Enable
Switch MII 10BT
Null VID Replacement
Broadcast Storm
Protection Rate Bit [10:8]
Broadcast Storm
Protection Rate Bit [7:0]
Factory Testing
Factory Testing
Factory Testing
Reserved
PHY Power
Save
Factory Setting
LED Mode
Special TPID Mode
Description
1, enable full-duplex flow control on switch MII interface.
0, disable full-duplex flow control on switch MII interface.
1, the switch interface is in 10Mbps mode.
0, the switch interface is in 100Mbps mode.
1, will replace null VID with port VID (12 bits).
0, no replacement for null VID.
This along with the next register determines how many
“64 byte blocks” of packet data allowed on an input port
in a preset period. The period is 50ms for 100BT or
500ms for 10BT. The default is 1%.
This along with the previous register determines how
many “64 byte blocks” of packet data are allowed on an
input port in a preset period. The period is 50ms for
100BT or 500ms for 10BT. The default is 1%.
Reserved.
Reserved.
Reserved.
N/A
0 = disable PHY power save mode.
1 = enable PHY power save mode.
Reserved.
0 = led mode 0.
1 = led mode 1.
LEDX_2
LEDX_1
LEDX_0
Used for direct mode forwarding from port 5.
See “Spanning Tree” functional description.
43
Speed
Mode 0
Lnk/Act
Fulld/Col
Mode 1
100Lnk/Act
10Lnk/Act
Fulld
Mode
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Default
Pin SMRXD3 strap
option. Pull-down
(0): disable flow
control. Pull-up(1):
enable flow control.
Note: SMRXD3
has internal pull-
down.
Pin SMRXD1 strap
option. Pull-down
(0): Enable
100Mbps. Pull-up
(1): Enable
10Mpbs.
Note: SMRXD1
has internal pull-
down.
0
000
0x4A
0x24
0x28
0x24
0
0
0
Pin SMRXD0 strap
option. Pull-down(0):
Enabled led mode 0.
Pull-up(1):
Enabled led mode 1.
Note: SMRXD0 has
internal pull-down 0.
0
(1)
M9999-051305
(1)
Micrel, Inc.