HCS370/SL Microchip Technology, HCS370/SL Datasheet - Page 17
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HCS370/SL
Manufacturer Part Number
HCS370/SL
Description
IC CODE HOPPING ENCODER 14-SOIC
Manufacturer
Microchip Technology
Type
Code Hopping Encoderr
Specifications of HCS370/SL
Applications
Remote Secure Access, Keyless Entry
Mounting Type
Surface Mount
Package / Case
14-SOIC (3.9mm Width), 14-SOL
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HCS370/SL
Manufacturer:
MICROCHIP
Quantity:
12 000
FIGURE 5-2:
5.4
To create your own step-up regulator circuit, first decide
on an output voltage. Second, set the V
divider to drop it down to 1.2 volts. Keep the sum of the
two resistors around 100 k . Third, put your maximum
load on the output and increase the inductance until
C
about 30 ms from the minimum input voltage. Finally,
test over your temperature and input voltage ranges.
The WAIT option will delay RF transmissions until
C
ton response times to save money on cheaper induc-
tors. This can also optimize performance for good
batteries and let response times drift for weak batteries.
Also, this option will indicate failure to reach regulation
voltage after 250 ms by not transmitting and not flash-
ing the LED. If WAIT is disabled, the step-up regulator
still operates and transmissions will always start 30 ms
after a button press.
The SLEEP Output Enable (SOEN) option can be
enabled if S5 is not used. This reconfigures S5 to be an
output high when the HCS370 is sleeping. S5 will be an
output low when a button press wakes it up. One way
to use this option is to save power on the step-up reg-
ulator. The problem is that the V
makes a DC path through the inductor and diode to dis-
charge the battery. By tying the bottom of the divider to
SLEEP as shown in Figure 2-1, the path is broken
between transmissions.
5.5
The CRC bits are calculated on the 65 previously trans-
mitted bits. These bits contain the 32-bit hopping code,
32-bit fixed code, and V
the CRC bits to check the data integrity before process-
ing starts. The CRC can detect all single bit errors and
66% of double bit errors. The CRC is computed as fol-
lows:
2002 Microchip Technology Inc.
OUT
OUT
SN
LED
V
LED
V
LEDBL=1
LED
V
LEDBL=0
DD
DD
DD
is charged. This permits a trade off in slower but-
> V
< V
< V
charges from 0 volts to your output voltage in
Step-Up Voltage Regulator
Cyclic Redundancy Check (CRC)
LOW
LOW
LOW
T
LEDON
LED OPERATION
LOW
T
LEDOFF
bit. The decoder can use
IN
resistor divider
IN
resistor
Preliminary
EQUATION 5-1:
and
with
and Di
5.6
The queuing or repeated pressing of the same buttons
can be handled in two ways on the HCS370. This is
controlled with the Queue Counter Enable (QUEN)
configuration option. This option can be different for
Encoder 1 and Encoder 2.
When the QUEN option is disabled, the device will reg-
ister up to two sequential button presses. In this case,
the device will complete the minimum code words
selected with the MTX option before the second code
word is calculated and transmitted. The code word will
be 67 bits in this case, with no additional queue bits
transmitted.
If the QUEN option is enabled, the queue bits are
added to the standard code word. The queue bits are a
2-bit counter that does not wrap. The counter value
starts at 00
within 2 seconds from the start of the previous button
press. The current code word is terminated when a but-
ton is queued. This allows additional functionality for
double or triple button presses.
FIGURE 5-3:
6.0
Refer to the “HCS370 Programming Specifications”
document (DS41157) in Microchip Literature.
DATA
DATA
QUEN = Enabled
QUEN = Disabled
SN
CRC 0
n
WAKE-UP
WAKE-UP
the nth transmission bit 0
Button Queue Information
(QUEUE)
PROGRAMMING
SPECIFICATIONS
CRC 1
2
and is incremented if a button is pushed
n
+
CODE1
CODE1
1
CODE WORD COMPLETION
WITH QUEN SETTINGS
n
=
CRC 1 0
+
00
1
CRC Calculation
CRC 0
CODE1
=
WAKE-UP
CRC 0
0
n
WAKE-UP
=
HCS370
<=
CODE2 01
Di
n
0
n
DS41111D-page 17
MTX = 01
n
<=
Di
CODE2
64
n
CRC 1
2
, WAKE > 00
CODE2 01
CODE2
n
2