LM27212SQX/NOPB National Semiconductor, LM27212SQX/NOPB Datasheet - Page 15

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LM27212SQX/NOPB

Manufacturer Part Number
LM27212SQX/NOPB
Description
IC CURR-MODE BUCK CTRLR 48-LLP
Manufacturer
National Semiconductor
Type
Step-Down (Buck)r
Datasheet

Specifications of LM27212SQX/NOPB

Internal Switch(s)
No
Synchronous Rectifier
Yes
Number Of Outputs
2
Voltage - Output
0.7 ~ 1.71 V
Voltage - Input
5 ~ 30 V
Operating Temperature
-5°C ~ 105°C
Mounting Type
Surface Mount
Package / Case
48-LLP
Power - Output
1.56W
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Output
-
Frequency - Switching
-
Other names
LM27212SQX
LM27212SQXTR
Design Considerations
calculated on-resistance by 4 to obtain the on-resistance for
each FET. In the case of more FETs, that number is the
square of the number of FETs. Since efficiency is very im-
portant in most cases, having the lowest on-resistance is
usually more important than fully utilizing the thermal capac-
ity of the package. So it is probably better to find the lowest
Rds FET first, and then determine how many are needed.
Example: T
V
If four bottom FETs are to be used (2 per channel), the
maximum on-resistance can be as high as 0.63mΩ x 16 =
10mΩ. Generally it will be better to use lower on-resistance
FETs.
Top FET Selection
The top FET has two types of losses – switching losses and
the conduction losses. The switching loss mainly consists of
the crossover loss and the bottom diode reverse recovery
loss. It is rather difficult to estimate the switching losses. A
general starting point is to allot 60% of the top FET thermal
capacity to switching loss. The best way to find out is still to
test it on the bench. The equation for calculating the on-
resistance of the top FET is thus:
where T
in the FET, T
R
and TC is the temperature coefficient of the on-resistance
which is typically 4000ppm/˚C.
Example: T
V
If four top FETs are to be used (2 per channel), the maximum
on-resistance can be as high as 1.35mΩ x 16 = 21.6mΩ.
in_max
in_min
θja
is the junction-to-ambient thermal resistance of the FET,
= 8.1V, V
= 15V, V
j_max
j_max
j_max
is the maximum allowed junction temperature
a_max
out
out
= 100˚C, T
= 100˚C, T
= 1.356V, and I
= 1.356V, and I
is the maximum ambient temperature,
a_max
a_max
= 60˚C, R
out_max
= 60˚C, R
out_max
(Continued)
= 30A.
= 30A.
θja
θja
= 60˚C/W,
= 60˚C/W,
15
Since the switching loss usually increases with bigger FETs,
choosing a top FET with a much smaller on-resistance
sometimes may not yield a noticeably lower temperature rise
and better efficiency.
INPUT CAPACITOR SELECTION
The fact that the two switching channels of the LM27212 are
180˚ out of phase will help reduce the RMS value of the
ripple current seen by the input capacitors. That will help
extend input capacitor life span and result in a more efficient
system. In most application, the output voltage is rather low
compared to the input voltage. The corresponding duty
cycles are therefore less than 50%, which means there will
be no overlapping between the two channels’ input current
pulses. The equation for calculating the maximum total input
ripple RMS current is therefore:
Example: I
The closer D is to 0.25, the larger the result. So the D value
that should be used in this example should be D = 1.356 /
8.1V = 0.167.
If we use 10µF ceramic capacitors at the input and each can
handle 1.5A of RMS ripple current, then we need 5 or 6 of
these capacitors.
SOFT-START CAPACITOR
The capacitor connected between the SS pin and ground
serves several purposes. Namely, soft start slew rate, soft
shutdown slew rate, and Dynamic VID and Mode Change
slew rates.
During soft-start, the current charging the SS capacitor is
20µA typical.
During soft shutdown, the current discharging the SS capaci-
tor is 40µA typical.
During Dynamic VID and Mode Change, the current charg-
ing or discharging the SS capacitor is 350µA typical.
Usually the Dynamic VID and Mode Change slew rate is
more critical than soft-start and soft shutdown slew rates. So
when selecting SS capacitor value, priority should be as-
signed accordingly.
The equation used to determine the SS capacitor value is:
where I
slew rate required.
The equation used to determine the transition time for a
given slew rate and SS capacitance is:
where ∆V is the voltage difference between the initial value
and the end-of-transition value.
SS
is the current through the SS pin, and dv/dt is the
out_max
= 30A, V
in
= 8.1V to 15V, V
out
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= 1.356V

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