MAX16904RAUE33/V+ Maxim Integrated Products, MAX16904RAUE33/V+ Datasheet - Page 11

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MAX16904RAUE33/V+

Manufacturer Part Number
MAX16904RAUE33/V+
Description
IC CONV MINI-BUCK 1A 16TSSOP
Manufacturer
Maxim Integrated Products
Type
Step-Down (Buck)r
Datasheet

Specifications of MAX16904RAUE33/V+

Internal Switch(s)
Yes
Synchronous Rectifier
Yes
Number Of Outputs
1
Voltage - Output
3.3V
Current - Output
600mA
Frequency - Switching
2.1MHz
Voltage - Input
3.5 ~ 28 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
16-TSSOP (0.173", 4.40mm Width) Exposed pad
Output Voltage
3.3 V
Input Voltage
3.5 V to 28 V
Switching Frequency
2.1 MHz
Operating Temperature Range
- 40 C to + 125 C
Mounting Style
SMD/SMT
Duty Cycle (max)
97 %
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
ESR of the input capacitor). The total voltage ripple is
the sum of ΔV
ripple from the ESR and the capacitor discharge is
equal to 50% each. The following equations show the
ESR and capacitor requirement for a target voltage rip-
ple at the input:
where:
and:
where I
and f
input capacitance at lower input voltages to avoid pos-
sible undershoot below the UVLO threshold during tran-
sient loading.
The allowable output-voltage ripple and the maximum
deviation of the output voltage during step load cur-
rents determine the output capacitance and its ESR.
The output ripple comprises of ΔV
capacitor discharge) and ΔV
the output capacitor). Use low-ESR ceramic or alu-
minum electrolytic capacitors at the output. For alu-
minum electrolytic capacitors, the entire output ripple is
contributed by ΔV
culate the ESR requirement and choose the capacitor
accordingly. If using ceramic capacitors, assume the
contribution to the output ripple voltage from the ESR
and the capacitor discharge to be equal. The following
equations show the output capacitance and ESR
requirement for a specified output-voltage ripple.
SW
OUT
is the switching frequency. Use additional
is the output current, D is the duty cycle,
ΔI
Q
P P
ESR
C
and ΔV
C
ESR
______________________________________________________________________________________
OUT
IN
=
ESR
=
=
(
. Use the ESR
V
D
I
=
⎝ ⎜
IN
OUT
I
ESR
OUT
=
ΔV
8
V
=
IN
×
V
Q
V
Δ
Δ
Δ
. Assume the input-voltage
OUT
V
Δ
×
OUT
ESR
×
Δ
V
IN
V
+
I
P P
V
ESR
×
ESR
I
P P
f
Q
D
Δ
SW
I
1 (
f
)
P P
(caused by the ESR of
×
SW
Output Capacitor
2
×
f
×
SW
OUT
D
V
Q
L
⎠ ⎟
) )
OUT
(caused by the
equation to cal-
600mA Mini-Buck Converter
where:
ΔI
above and f
The allowable deviation of the output voltage during
fast transient loads also determines the output capaci-
tance and its ESR. The output capacitor supplies the
step load current until the converter responds with a
greater duty cycle. The response time (t
depends on the closed-loop bandwidth of the convert-
er. The device’s high switching frequency allows for a
higher closed-loop bandwidth, thus reducing
t
The resistive drop across the output capacitor’s ESR
and the capacitor discharge causes a voltage droop
during a step load. Use a combination of low-ESR tan-
talum and ceramic capacitors for better transient load
and ripple/noise performance. Keep the maximum out-
put-voltage deviations below the tolerable limits of the
electronics being powered. When using a ceramic
capacitor, assume an 80% and 20% contribution from
the output capacitance discharge and the ESR drop,
respectively. Use the following equations to calculate
the required ESR and capacitance value:
where I
response time of the converter. The converter response
time depends on the control-loop bandwidth.
Careful PCB layout is critical to achieve low switching
power losses and clean stable operation. Use a multilayer
board wherever possible for better noise immunity. Refer
to the MAX16904 Evaluation Kit for recommended PCB
layout. Follow these guidelines for a good PCB layout:
1) The input capacitor (4.7μF, see the applications
RESPONSE
P-P
2.1MHz, High-Voltage,
schematic in the Typical Operating Circuits ) should be
placed right next to the SUP pins (pins 2 and 3 on the
TSSOP-EP package). Because the device operates at
2.1MHz switching frequency, this placement is critical
for effective decoupling of high-frequency noise from
the SUP pins.
is the peak-to-peak inductor current as calculated
STEP
and the output capacitance requirement.
SW
V
C
ΔI
is the load step and t
OUT RIPPLE
OUT
P P
is the converter’s switching frequency.
_
ESR
=
=
I
(
STEP
V
OUT
IN
V
PCB Layout Guidelines
IN
≅ ≅
=
V
×
×
OUT
Δ
Δ
Δ
I
V
STEP
t
f
V
V
RESPONSE
SW
ESR
Q
ESR
)
×
×
V
+
L
OUT
Δ
RESPONSE
V
Q
RESPONSE
is the
11
)

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