MAX5098AATJ+T Maxim Integrated Products, MAX5098AATJ+T Datasheet - Page 11

• Manufacturer Part Number: MAX5098AATJ+T
• Description: IC CONV BUCK/BOOST DL 32TQFN-EP
• Manufacturer: Maxim Integrated Products
• Type: Step-Down (Buck), Step-Up (Boost)r

Specifications of MAX5098AATJ+T

• Internal Switch(s): Yes
• Synchronous Rectifier: No
• Number Of Outputs: 2
• Voltage - Output: 0.8 ~ 0.85 V, 4.5 ~ 28 V
• Current - Output: 1A, 2A
• Frequency - Switching: 200kHz ~ 2.2MHz
• Voltage - Input: 4.5 ~ 19 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 32-TQFN Exposed Pad
• Power - Output: 2.76W
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

1, 32
PIN
2, 3
10
11
12
13
14
15
4
5
6
7
8
9
SOURCE2
PGOOD2
IN_HIGH
DRAIN2
ON/OFF
COMP2
NAME
SGND
SYNC
GATE
OSC
EN2
FB2
Converter with 80V Load-Dump Protection
V+
V
L
Dual, 2.2MHz, Automotive Buck or Boost
______________________________________________________________________________________
Converter 2 Internal MOSFET Source Connection. For buck converter operation, connect SOURCE2 to the
switched side of the inductor. For boost operation, connect SOURCE2 to PGND_ (Figure 6).
Converter 2 Internal MOSFET Drain Connection. For buck converter operation, use the MOSFET as a high-
side switch and connect DRAIN2 to the DC-DC converters supply input rail. For boost converter operation,
use the MOSFET as a low-side switch and connect DRAIN2 to the inductor and diode junction (Figure 6).
Converter 2 Open-Drain Power-Good Output. PGOOD2 goes low when converter 2’s output falls below
92.5% of its set regulation voltage. Use PGOOD2 and EN1 to sequence the converters. Converter 2 starts
first.
Converter 2 Active-High Enable Input. Connect to V
Converter 2 Feedback Input. Connect FB2 to a resistive divider between converter 2’s output and SGND to
adjust the output voltage. To set the output voltage below 0.8V, connect FB2 to a resistive voltage-divider
from BYPASS to regulator 2’s output (Figure 3). See the Setting the Output Voltage section.
Converter 2 Internal Transconductance Amplifier Output. See the Compensation section.
Oscillator Frequency Set Input. Connect a resistor from OSC to SGND (R
(see the Setting the Switching Frequency section). Set R
input frequency when using external synchronization. R
connected to the SYNC input. See the Synchronization (SYNC)/Clock Output (CKO) section.
External Clock Synchronization Input. Connect SYNC to a 400kHz to 4400kHz clock to synchronize the
switching frequency with the system clock. Each converter frequency is 1/2 of the frequency applied to
SYNC (FSEL_1 = V
SYNC frequency. Connect SYNC to SGND when not used.
Gate Drive Output. Connect to the gate of the external n-channel load-dump protection MOSFET. GATE =
IN_HIGH + 9V (typ) with IN_HIGH = 12V. GATE pulls to IN_HIGH by an internal n-channel MOSFET when V+
raises 2V above IN_HIGH. Leave gate unconnected if the load-dump protection is not used (MOSFET not
installed).
n-Channel Switch Enable Input. Drive ON/OFF high for normal operation. Drive ON/OFF low to turn off the
external n-channel load-dump protection MOSFET and reduce the supply current to 7µA (typ). When
ON/OFF is driven low, both DC-DC converters are disabled and the PGOOD_ outputs are driven low.
Connect to V+ if the external load-dump protection is not used (MOSFET not installed).
Startup Input. IN_HIGH is protected by internally clamping to 21V (max). Connect a resistor (4kΩ max) from
IN_HIGH to the drain of the protection switch. Bypass IN_HIGH with a 4.7µF electrolytic or 1µF minimum
ceramic capacitor. Connect to V+ if the external load-dump protection is not used (MOSFET not installed).
Input Supply Voltage. V+ can range from 5.2V to 19V. Connect V+, IN_HIGH, and V
5.5V input operation. Bypass V+ to SGND with a 1µF minimum ceramic capacitor.
Internal Regulator Output. The V
VDRV, use an RC lowpass filter to decouple switching noise from VDRV to the V
Application Circuit). Bypass V
Signal Ground. Connect SGND to exposed pad and to the board signal ground plane. Connect the board
signal ground and power ground planes together at a single point.
L
). For FSEL_1 = SGND, the switching frequency of converter 1 becomes 1/4 of the
L
to SGND with a 4.7µF minimum ceramic capacitor.
L
regulator is used to supply the drive current at input VDRV. When driving
FUNCTION
L
for always-on operation.
OSC
OSC
is still required when an external clock is
for an oscillator frequency equal to the SYNC
OSC
) to set the switching frequency
L
Pin Description
regulator (see the Typical
L
together for 4.5V to
11