EL7535IYZ Intersil, EL7535IYZ Datasheet - Page 8

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EL7535IYZ

Manufacturer Part Number
EL7535IYZ
Description
IC REG 350MA STEP-DOWN 10-MSOP
Manufacturer
Intersil
Type
Step-Down (Buck)r
Datasheet

Specifications of EL7535IYZ

Internal Switch(s)
Yes
Synchronous Rectifier
Yes
Number Of Outputs
1
Voltage - Output
0.8 ~ 6 V
Current - Output
350mA
Frequency - Switching
1.4MHz
Voltage - Input
2.5 ~ 6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
10-MSOP, Micro10™, 10-uMAX, 10-uSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power - Output
-

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output set point. Equation 5 shows the pole frequency
relationship:
Current Limit and Short-Circuit Protection
The current limit is set at about 1.5A for the PMOS. When a
short-circuit occurs in the load, the preset current limit
restricts the amount of current available to the output, which
causes the output voltage to drop below the preset voltage.
In the meantime, the excessive current heats up the
regulator until it reaches the thermal shut-down point.
Thermal Shut-Down
Once the junction reaches about +145°C, the regulator shuts
down. Both the P-Channel and the N-Channel MOSFETs
turn off. The output voltage will drop to zero. With the output
MOSFETs turned off, the regulator will soon cool down.
Once the junction temperature drops to about +130°C, the
regulator will restart again in the same manner as EN pin
connects to logic HI.
Thermal Performance
The EL7535 is in a fused-lead 10 Ld MSOP package.
Compared with regular 10 Ld MSOP package, the fused-lead
package provides lower thermal resistance. The θ
+100°C/W on a 4-layer board and +125°C/W on 2-layer
board. Maximizing the copper area around the pins will further
improve the thermal performance.
f
P
=
---------------------------------------
2π R
(
1
1
R
2
)C
4
8
JA
is
(EQ. 5)
EL7535
Layout Considerations
The layout is very important for the converter to function
properly. The following PC layout guidelines should be
followed:
• Separate the Power Ground ( ) and Signal Ground ( );
• Place the input capacitor as close to V
• Make the following PC traces as small as possible:
• If used, connect the trace from the FB pin to R
• Maximize the copper area around the PGND pin
• Place several via holes under the chip to additional ground
The demo board is a good example of layout based on this
outline. Please refer to the EL7535 Application Note.
connect them only at one point right at the pins
as possible
- from L
- from C
close as possible
plane to improve heat dissipation
X
O
pin to L
to PGND
IN
and PGND pins
February 26, 2008
1
and R
FN7003.6
2
as

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