ISL97536IUZ-TK Intersil, ISL97536IUZ-TK Datasheet - Page 7

• Manufacturer Part Number: ISL97536IUZ-TK
• Description: IC REG PWM STEP-DWN 1A 10-MSOP
• Manufacturer: Intersil
• Type: Step-Down (Buck)r

Specifications of ISL97536IUZ-TK

• Internal Switch(s): Yes
• Synchronous Rectifier: Yes
• Number Of Outputs: 1
• Voltage - Output: 0.8 ~ 6 V
• Current - Output: 1A
• Frequency - Switching: 1.4MHz
• Voltage - Input: 2.5 ~ 6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 10-MSOP, Micro10™, 10-uMAX, 10-uSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power - Output: -

Component Selection
Because of the fixed internal compensation, the component
choice is relatively narrow. For a regulator with fixed output
voltage, only two capacitors and one inductor are required.
Capacitors must be chosen in the range of 10µF to 40µF,
multilayer ceramic capacitors with X5R or X7R rating for
both the input and output capacitors, and inductors in the
range of 1.5µH to 2.2µH.
The RMS current present at the input capacitor is decided by
Equation 3:
This is about half of the output current I
input capacitor must be able to handle this current.
The inductor peak-to-peak ripple current is given as shown
in Equation 4:
The inductor must be able to handle I
current, and to assure that the inductor is reliable, it must
handle the 2A surge current that can occur during a current
limit condition.
In addition to decoupling capacitors and inductor value, it is
important to properly size the phase-lead capacitor C
(Refer to the “Pinout and Typical Application Diagram” on
page 1). The phase-lead capacitor creates additional phase
margin in the control loop by generating a zero and a pole in
the transfer function. As a general rule of thumb, C
be sized to start the phase-lead at a frequency of ~2.5kHz.
The zero will always appear at lower frequency than the pole
and follow Equation 5:
Over a normal range of R
~470pF to 4700pF. The pole frequency cannot be set once
the zero frequency is chosen as it is dictated by the ratio of
R
set point. Equation 6 shows the pole frequency relationship:
f
f
ΔI
I
Z
P
INRMS
1
L is the inductance
f
IL
S
=
=
and R
the switching frequency (nominally 1.4MHz)
=
----------------------
2πR
---------------------------------------
2π R
(
------------------------------------------- -
(
V
=
1
2
2
IN
L
1
C
-----------------------------------------------
, which is solely determined by the desired output
×
1
V
4
–
V
R
O
V
IN
2
O
×
)C
)
×
(
V
V
×
4
f
IN
S
IN
V
O
–
V
O
2
)
(~10k to100k), C
×
I
O
7
O
O
for the RMS load
for all the V
4
will range from
4
should
O
4
(EQ. 3)
(EQ. 5)
(EQ. 6)
(EQ. 4)
. This
ISL97536
Layout Considerations
The layout is very important for the converter to function
properly. The following PC layout guidelines should be
followed:
The demo board is a good example of layout based on this
outline.
1. Separate the Power Ground (
2. Place the input capacitor as close to V
3. Make the following PC traces as small as possible:
4. If used, connect the trace from the FB pin to R
5. Maximize the copper area around the PGND pin
6. Place several via holes under the chip to additional
(
as possible
- from LX pin to L
- from C
as close as possible
ground plane to improve heat dissipation
); connect them only at one point right at the pins
O
to PGND
) and Signal Ground
IN
and PGND pins
November 2, 2007
1
and R
FN6279.1
2