LT3435EFE#TRPBF Linear Technology, LT3435EFE#TRPBF Datasheet
LT3435EFE#TRPBF
Specifications of LT3435EFE#TRPBF
Available stocks
Related parts for LT3435EFE#TRPBF
LT3435EFE#TRPBF Summary of contents
Page 1
... USB Powered Systems , LTC and LT are registered trademarks of Linear Technology Corporation. Burst Mode is a registered trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. *Protected by U.S. Patents including 6498466 **See Burst Mode Operation section for conditions. ...
Page 2
LT3435 ABSOLUTE AXI U RATI GS (Note SHDN, BIAS, PGOOD, SW ............................... 60V IN BOOST Pin Above SW ............................................ 35V BOOST Pin Voltage ................................................. 68V SYNC PGFB, FB ................................................ 6V SS Operating ...
Page 3
ELECTRICAL CHARACTERISTICS temperature range, otherwise specifications are at T unless otherwise noted. SYMBOL PARAMETER EA Source Current EA Sink Current High Clamp Current Limit PK Switch On Resistance (Note 9) ...
Page 4
LT3435 W U TYPICAL PERFOR A CE CHARACTERISTICS FB Voltage 1.30 1.29 1.28 1.27 1.26 1.25 1.24 1.23 1.22 1.21 1.20 – 125 –25 100 TEMPERATURE (°C) 3435 G01 SHDN Pin Current 5 25°C ...
Page 5
W U TYPICAL PERFOR A CE CHARACTERISTICS Switch Peak Current Limit 6.0 5.5 5.0 4.5 4.0 3.5 3.0 –50 –25 – 100 125 TEMPERATURE (°C) 3435 G10 Switch On Voltage (V ) CESAT 500 450 400 T ...
Page 6
LT3435 W TYPICAL PERFOR A CE CHARACTERISTICS Dropout Operation 4 3.3V OUT BOOST DIODE = DIODES INC DFLS160 3.5 3.0 2.5 2.0 1.5 LOAD CURRENT = 2.5A 1.0 LOAD CURRENT = 250mA 0 2.5 3 3.5 ...
Page 7
CTIO S When the PGFB pin rises above V PGFB from the C pin into the external capacitor. When the volt- T age on the external capacitor reaches an internal clamp (V ), the PG ...
Page 8
LT3435 W BLOCK DIAGRA V IN INTERNAL REF 4 UNDERVOLTAGE LOCKOUT BIAS THERMAL 10 SHUTDOWN SYNC 14 SHDN + 15 SHDN COMP – 1. SOFT-START 9 FOLDBACK DETECT FB – 12 ERROR AMP + 1.25V ...
Page 9
W BLOCK DIAGRA power from the V pin, but if the BIAS pin is connected external voltage higher than 3V bias power will be drawn from the external source (typically the regulated output voltage). This improves efficiency. ...
Page 10
LT3435 U U APPLICATIO S I FOR ATIO and Soft-Start Current graphs in Typical Performance Characteristics). Frequency foldback is done to control power dissipation in both the IC and in the external diode and inductor during short-circuit conditions. A shorted ...
Page 11
U U APPLICATIO S I FOR ATIO taken to ensure the ripple and surge ratings are not exceeded. The AVX TPS and Kemet T495 series are surge rated AVX recommends derating capacitor operating volt- age by 2:1 for high surge ...
Page 12
LT3435 U U APPLICATIO S I FOR ATIO V OUT 20mV/DIV AC-COUPLED C = 100µF OUT TANTALUM ESR 100mΩ V OUT 20mV/DIV AC-COUPLED C = 100µF OUT CERAMIC V SW 5V/DIV V = 12V 500ns/DIV 3.3V OUT ...
Page 13
U U APPLICATIO S I FOR ATIO To calculate actual peak switch current in continuous mode with a given set of conditions, use – V OUT IN OUT = + ( )( )( ) ...
Page 14
... After making an initial choice, consider the secondary things like output voltage ripple, second sourcing, etc. Use the experts in the Linear Technology’s applications department if you feel uncertain about the final choice. They have experience with a wide range of inductor types and can tell you about the latest developments in low profile, surface mounting, etc ...
Page 15
U U APPLICATIO S I FOR ATIO ramp rate. When the current through the C exceeds the C threshold (I ), the voltage ramp of the SS CSS output capacitor is limited by reducing the V The C threshold is ...
Page 16
LT3435 U U APPLICATIO S I FOR ATIO load condition can be anticipated, the supply current can be further reduced by cycling the SHDN pin at a rate higher than the natural no load burst frequency. Figure ...
Page 17
U U APPLICATIO S I FOR ATIO output voltage is less than 3. recommended that an alternate boost supply is used. The boost diode can be connected to the input (Figure 7b) but care must be taken to ...
Page 18
LT3435 U U APPLICATIO S I FOR ATIO Example – Ω µ Ω Ω ...
Page 19
U U APPLICATIO S I FOR ATIO threshold during normal operation, the C discharged and PG inactive, resulting in a non Power Good cycle when SHDN is taken above its threshold. Figure 9 shows the power good operation with PGFB ...
Page 20
LT3435 U U APPLICATIO S I FOR ATIO parasitic inductance produces a flyback spike across the LT3435 switch. When operating at higher currents and input voltages, with poor layout, this spike can generate voltages across the LT3435 that may exceed ...
Page 21
U U APPLICATIO S I FOR ATIO Example: with V = 25V and I IN OUT ( )( ) ( ) – ...
Page 22
LT3435 U U APPLICATIO S I FOR ATIO catch diode and connecting the V ground track carrying significant switch current. In addi- tion the theoretical analysis considers only first order non- ideal component behavior. For these reasons important ...
Page 23
... DIMENSIONS ARE IN 3. DRAWING NOT TO SCALE Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights Package 16-Lead Plastic TSSOP (4 ...
Page 24
... I = 100µA, TSSOP-16E IN OUT Q : 3.3V to 60V 100µA, I < 1µ 36V 0.8V 670µ OUT(MIN 0306 REV A • PRINTED IN USA © LINEAR TECHNOLOGY CORPORATION 2005 < 15µA, < 6µA, < 1µA, < 1µA, SD < 1µA, < 1µA, SD < 20µA, 3435fa ...