LTC3728EG#TRPBF Linear Technology, LTC3728EG#TRPBF Datasheet - Page 18

IC SW REG SYNC STP-DN DUAL28SSOP

LTC3728EG#TRPBF

Manufacturer Part Number
LTC3728EG#TRPBF
Description
IC SW REG SYNC STP-DN DUAL28SSOP
Manufacturer
Linear Technology
Series
PolyPhase®r
Type
Step-Down (Buck)r
Datasheet

Specifications of LTC3728EG#TRPBF

Internal Switch(s)
No
Synchronous Rectifier
Yes
Number Of Outputs
2
Voltage - Output
0.8 ~ 5.5 V
Current - Output
3A
Frequency - Switching
250kHz ~ 550kHz
Voltage - Input
3.5 ~ 36 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
28-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power - Output
-

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APPLICATIONS INFORMATION
LTC3728
the maximum RMS current of one channel must be used.
The maximum RMS capacitor current is given by:
This formula has a maximum at V
I
monly used for design because even signifi cant deviations
do not offer much relief. Note that capacitor manufacturer’s
ripple current ratings are often based on only 2000 hours
of life. This makes it advisable to further derate the capaci-
tor, or to choose a capacitor rated at a higher temperature
than required. Several capacitors may also be paralleled
to meet size or height requirements in the design. Always
consult the manufacturer if there is any question.
The benefi t of the LTC3728 multiphase can be calculated by
using the equation above for the higher power controller
and then calculating the loss that would have resulted if
both controller channels switch on at the same time. The
total RMS power lost is lower when both controllers are
operating due to the interleaving of current pulses through
the input capacitor’s ESR. This is why the input capacitor’s
requirement calculated above for the worst-case controller
is adequate for the dual controller design. Remember that
input protection fuse resistance, battery resistance and PC
board trace resistance losses are also reduced due to the
reduced peak currents in a multiphase system. The overall
benefi t of a multiphase design will only be fully realized
when the source impedance of the power supply/battery
is included in the effi ciency testing. The drains of the
two top MOSFETs should be placed within 1cm of each
other and share a common C
and C
resonances at V
The selection of C
series resistance (ESR). Typically, once the ESR require-
ment is satisfi ed the capacitance is adequate for fi ltering.
18
RMS
C
IN
= I
IN
Required I
OUT
may produce undesirable voltage and current
/2. This simple worst case condition is com-
IN
RMS
.
OUT
is driven by the required effective
I
MAX
IN
V
OUT
(s). Separating the drains
(
V
IN
IN
V
IN
= 2V
V
OUT
OUT
)
, where
1/2
The output ripple (ΔV
Where f = operating frequency, C
and ΔI
highest at maximum input voltage since ΔI
input voltage. With ΔI
will typically be less than 50mV at max V
The fi rst condition relates to the ripple current into the ESR
of the output capacitance while the second term guarantees
that the output capacitance does not signifi cantly discharge
during the operating frequency period due to ripple current.
The choice of using smaller output capacitance increases
the ripple voltage due to the discharging term but can be
compensated for by using capacitors of very low ESR to
maintain the ripple voltage at or below 50mV. The I
OPTI-LOOP compensation components can be optimized
to provide stable, high performance transient response
regardless of the output capacitors selected.
Manufacturers such as Nichicon, United Chemicon and
Sanyo can be considered for high performance through-
hole capacitors. The OS-CON semiconductor dielectric
capacitor available from Sanyo has the lowest (ESR)(size)
product of any aluminum electrolytic at a somewhat
higher price. An additional ceramic capacitor in parallel
with OS-CON capacitors is recommended to reduce the
inductance effects.
In surface mount applications multiple capacitors may
need to be used in parallel to meet the ESR, RMS current
handling and load step requirements of the application.
Aluminum electrolytic, dry tantalum and special polymer
capacitors are available in surface mount packages. Special
polymer surface mount capacitors offer very low ESR but
C
and C
OUT
V
OUT
L
= ripple current in the inductor. The output ripple is
Recommended ESR < 2 R
OUT
> 1/(8fR
I
L
ESR +
SENSE
OUT
L
= 0.3I
8fC
) is determined by:
)
1
OUT
OUT(MAX)
OUT
SENSE
= output capacitance,
the output ripple
L
IN
increases with
assuming:
TH
3728fg
pin

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