LT1375IS8#TRPBF Linear Technology, LT1375IS8#TRPBF Datasheet - Page 15
![IC SW REG 1.5A ADJ STP-DWN 8SOIC](/photos/7/58/75844/lt1375is8_sml.jpg)
LT1375IS8#TRPBF
Manufacturer Part Number
LT1375IS8#TRPBF
Description
IC SW REG 1.5A ADJ STP-DWN 8SOIC
Manufacturer
Linear Technology
Type
Step-Down (Buck)r
Datasheet
1.LT1376CS8PBF.pdf
(28 pages)
Specifications of LT1375IS8#TRPBF
Internal Switch(s)
Yes
Synchronous Rectifier
No
Number Of Outputs
1
Voltage - Output
2.42 ~ 21.5 V
Current - Output
1.5A
Frequency - Switching
500kHz
Voltage - Input
5 ~ 25 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power - Output
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
APPLICATIONS
or latch low under low source voltage conditions. UVLO
prevents the regulator from operating at source voltages
where these problems might occur.
Threshold voltage for lockout is about 2.38V, slightly less
than the internal 2.42V reference voltage. A 3.5µA bias
current flows out of the pin at threshold. This internally
generated current is used to force a default high state on
the shutdown pin if the pin is left open. When low shut-
down current is not an issue, the error due to this current
can be minimized by making R
current is an issue, R
due to initial bias current and changes with temperature
should be considered.
V
Keep the connections from the resistors to the shutdown
pin short and make sure that interplane or surface capaci-
tance to the switching nodes are minimized. If high resis-
tor values are used, the shutdown pin should be bypassed
with a 1000pF capacitor to prevent coupling problems
from the switch node. If hysteresis is desired in the
undervoltage lockout point, a resistor R
the output node. Resistor values can be calculated from:
IN
R
R
= Minimum input voltage
LO
HI
=
=
2 38
10
.
R
k
LO
to 100k 25k suggested
INPUT
V R
(
V
−
IN
−
U
LO
C1
LO
2 38
(
.
3 5
(
can be raised to 100k, but the error
. µ
INFORMATION
R
R
V
U
LO
HI
)
A
)
LO
10k or less. If shutdown
IN
SHDN
LT1375/LT1376
W
FB
)
can be added to
Figure 4. Undervoltage Lockout
3.5µA
U
2.38V
0.37V
GND
R
FB
+
–
+
–
25k suggested for R
V
∆V = Hysteresis in input voltage level
Example: output voltage is 5V, switching is to stop if input
voltage drops below 12V and should not restart unless
input rises back to 13.5V. ∆V is therefore 1.5V and V
12V. Let R
SWITCH NODE CONSIDERATIONS
For maximum efficiency, switch rise and fall times are
made as short as possible. To prevent radiation and high
frequency resonance problems, proper layout of the com-
ponents connected to the switch node is essential. B field
IN
R
R
R
R
= Input voltage at which switching stops as input
HI
FB
HI
FB
voltage descends to trip level
=
=
=
=
=
114 5 1 5
R
( )(
25 12 2 38 1 5 5 1 1 5
25 10 41
R
LO IN
LO
HI
STANDBY
k
TOTAL
SHUTDOWN
k
2 29
[
k
[
(
= 25k.
V
.
(
V
2 38 25 3 5
OUT
.
/ .
−
.
−
2 38
2 38
.
)
V
.
/
.
LO
SW
−
)
=
∆
=
V
114
−
(
(
380
)
∆
R
k
. /
V V
2 3 5
(
k
(
/
k
.
.
OUT
+
µ
LT1375/LT1376
+
µ
A
)
A
)
+
+
)
1
1375/76 F04
)
OUTPUT
.
+
]
∆
V
]
15
13756fd
IN
=