LT3689EMSE#PBF Linear Technology, LT3689EMSE#PBF Datasheet - Page 24

• Manufacturer Part Number: LT3689EMSE#PBF
• Description: IC SWIT REG BUCK 700MA ADJ 16MSO
• Manufacturer: Linear Technology
• Type: Step-Down (Buck)r

Specifications of LT3689EMSE#PBF

• Internal Switch(s): Yes
• Synchronous Rectifier: No
• Number Of Outputs: 1
• Voltage - Output: 0.8 ~ 34.2 V
• Current - Output: 700mA
• Frequency - Switching: 350kHz ~ 2.2MHz
• Voltage - Input: 3.6 ~ 36 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 16-MSOP Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power - Output: -

LT3689/LT3689-5
In both watchdog modes, when WDO is asserted, the reset
timer is enabled. Any WDI pulses that appear while the
reset timer is running are ignored. When the reset timer
expires, the WDO is allowed to go high again. Therefore,
if no input is applied to the WDI pin, then the watchdog
circuitry produces a train of pulses on the WDO pin. The
high time of this pulse train is equal to the timeout period,
and low time is equal to the reset period. Also, WDO and
RST cannot be logic low simultaneously. If WDO is low
and RST goes low, then WDO will go high.
The WDE pin allows the user to turn on and off the watch-
dog function. Do not leave this pin open. Tie it high or
low to turn watchdog off or on, respectively. The W/T pin
enables/disables the window/timeout mode. Leaving this
pin open is fine and will put the watchdog in window mode.
It has a weak pull-down to ground. The WDI pin has an
internal 2µA weak pull-up that keeps the WDI pin high. If
APPLICATIONS INFORMATION
24
2V/DIV
2V/DIV
1V/DIV
V
C
RST
POR
OUT
Figure 10. Reset Timer Waveforms
50ms/DIV
Figure 12. Timeout Watchdog Waveforms (W/T = High)
t
C
RST
POR
= 165ms
5V/DIV
2V/DIV
1V/DIV
1V/DIV
= 71nF
C
WDO
C
WDI
WDT
3689 F10
POR
t
WDU
= 180ms, C
t
RST
100ms/DIV
= 165ms, C
WDT
watchdog is disabled, leaving this pin open is acceptable.
Selecting the Reset Timing Capacitors
The reset timeout period is adjustable in order to accom-
modate a variety of microprocessor applications. The
reset timeout period, (t
capacitor, C
value of this capacitor is determined by:
This equation is accurate for reset timeout periods of
5ms, or greater. To program faster timeout periods, see
the Reset Timeout Period vs Capacitance graph in the
Typical Performance Characteristics section. Leaving the
C
timeout of approximately 25µs. Maximum reset timeout
= 10nF
POR
POR
C
POR
Figure 11. Window Watchdog Waveforms (W/T = Low)
= 71nF
pin unconnected will generate a minimum reset
= t
5V/DIV
2V/DIV
1V/DIV
1V/DIV
C
3689 F12
WDO
C
WDI
WDT
POR
POR
RST
, between the C
C
• 432
WDT
= 10nF , t
RST
ms
pF
WDL
5ms/DIV
), is adjusted by connecting a
= 5.8ms
POR
pin and ground. The
3689 F11
3689fd